LAN8740A Datasheet, PDF (73/136 Pages) Microchip Technology – Small Footprint MII/RMII 10/100 Energy Efficient Ethernet Transceiver with HP Auto-MDIX and flexPWR® Technology

4.2.14 SPECIAL MODES REGISTER
Index (In Decimal): 18
LAN8740A/LAN8740Ai
Size:
16 bits
Bits
Description
15 RESERVED
14 MIIMODE
Reflects the mode of the digital interface:
0 = MII mode
1 = RMII mode
Type
RO
RO
Default
-
(see Note 1)
13:8 RESERVED
RO
7:5 MODE
Transceiver mode of operation. Refer to Section 3.7.2, "MODE[2:0]: Mode
Configuration" for additional details.
R/W
NASR
4:0 PHYAD
R/W
PHY Address. The PHY Address is used for the SMI address and for initializa- _NASR
tion of the Cipher (Scrambler) key. Refer to Section 3.7.1, "PHYAD[2:0]: PHY
Address Configuration" for additional details.
-
(see Note 2)
(see Note 3)
Note 1: The default value of this field is determined by the RMIISEL configuration strap. Refer to Section 3.7.3,
"RMIISEL: MII/RMII Mode Configuration" for additional information.
2: The default value of this field is determined by the MODE[2:0] configuration straps. Refer to Section 3.7.2,
"MODE[2:0]: Mode Configuration" for additional information.
3: The default value of this field is determined by the PHYAD[0] configuration strap. Refer to Section 3.7.1,
"PHYAD[2:0]: PHY Address Configuration" for additional information.
 2013-2015 Microchip Technology Inc.
DS00001987A-page 73