LAN8740A Datasheet, PDF (28/136 Pages) Microchip Technology – Small Footprint MII/RMII 10/100 Energy Efficient Ethernet Transceiver with HP Auto-MDIX and flexPWR® Technology

LAN8740A/LAN8740Ai
3.4.3 MII VS. RMII CONFIGURATION
The device must be configured to support the MII or RMII bus for connectivity to the MAC. This configuration is done
via the RMIISEL configuration strap. MII or RMII mode selection is configured based on the strapping of the RMIISEL
configuration strap as described in Section 3.7.3, "RMIISEL: MII/RMII Mode Configuration". Additionally, the MII/RMII
interface can be disabled (outputs driven low) via the Interface Disable bit of the Wakeup Control and Status Register
(WUCSR).
Most of the MII and RMII pins are multiplexed. Table 3-2, "MII/RMII Signal Mapping" describes the relationship of the
related device pins to the MII and RMII mode signal names.
TABLE 3-2: MII/RMII SIGNAL MAPPING
Pin Name
TXD0
TXD1
TXEN
RXER/
RXD4/PHYAD0
COL/CRS_DV/MODE2
RXD0/MODE0
RXD1/MODE1
TXD2
TXD3
nINT/TXER/TXD4
CRS
RXDV
RXD2/RMIISEL
RXD3/PHYAD2
TXCLK
RXCLK/PHYAD1
XTAL1/CLKIN
MII Mode
TXD0
TXD1
TXEN
RXER
COL
RXD0
RXD1
TXD2
TXD3
TXER/
TXD4
CRS
RXDV
RXD2
RXD3
TXCLK
RXCLK
XTAL1/CLKIN
RMII Mode
TXD0
TXD1
TXEN
RXER
(see Note 1)
CRS_DV
RXD0
RXD1
(see Note 2)
(see Note 2)
REF_CLK
Note 1: The RXER signal is optional on the RMII bus. This signal is required by the transceiver, but it is optional for
the MAC. The MAC can choose to ignore or not use this signal.
2: In RMII mode, this pin needs to be tied to VSS.
DS00001987A-page 28
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