LAN8740A Datasheet, PDF (8/136 Pages) Microchip Technology – Small Footprint MII/RMII 10/100 Energy Efficient Ethernet Transceiver with HP Auto-MDIX and flexPWR® Technology

LAN8740A/LAN8740Ai
TABLE 2-1: MII/RMII SIGNALS (CONTINUED)
Num Pins
1
Name
Receive
Data 0
PHY Operat-
ing Mode 0
Configuration
Strap
Symbol
RXD0
MODE0
1
Receive
RXD1
Data 1
PHY Operat-
ing Mode 1
Configuration
Strap
MODE1
1
Receive
RXD2
Data 2
(MII Mode)
Power Man-
agement Event
Output
nPME
MII/RMII Mode
Select Configu-
ration Strap
RMIISEL
Buffer Type
Description
VO8
VIS
(PU)
Bit 0 of the 4 (2 in RMII mode) data bits that are
sent by the transceiver on the receive path.
Combined with MODE1 and MODE2, this configu-
ration strap sets the default PHY mode.
VO8
VIS
(PU)
See Note 1 for more information on configuration
straps.
Note:
Refer to Section 3.7.2, "MODE[2:0]:
Mode Configuration" for additional
details.
Bit 1 of the 4 (2 in RMII mode) data bits that are
sent by the transceiver on the receive path.
Combined with MODE0 and MODE2, this configu-
ration strap sets the default PHY mode.
VO8
VO8
VIS
(PD)
See Note 1 for more information on configuration
straps.
Note:
Refer to Section 3.7.2, "MODE[2:0]:
Mode Configuration" for additional
details.
Bit 2 of the 4 (in MII mode) data bits that are sent by
the transceiver on the receive path.
Note: This signal is not used in RMII mode.
When in RMII mode, this pin may be used alterna-
tively as an active low Power Management Event
(PME) output.
Note:
The nPME signal can be optionally con-
figured to output on the LED1, LED2, or
RXD2/nPME/nINTSEL pins. Refer to
Section 3.8.4, "Wake on LAN (WoL)" for
additional nPME and WoL information.
This configuration strap selects the MII or RMII
mode of operation. When strapped low to VSS, MII
mode is selected. When strapped high to VDDIO
RMII mode is selected.
See Note 1 for more information on configuration
straps.
Note:
Refer to Section 3.7.3, "RMIISEL:
MII/RMII Mode Configuration" for addi-
tional details.
DS00001987A-page 8
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