PIC16F872_06 Datasheet, PDF (54/168 Pages) Microchip Technology – 28-Pin, 8-Bit CMOS Flash Microcontroller with 10-Bit A/D

PIC16F872
REGISTER 9-1:
SSPSTAT: SYNC SERIAL PORT STATUS REGISTER (ADDRESS: 94h)
R/W-0
R/W-0
R-0
R-0
R-0
R-0
R-0
SMP
CKE
D/A
P
S
R/W
UA
bit 7
R-0
BF
bit 0
bit 7
SMP: Sample bit
SPI Master mode:
1 = Input data sampled at end of data output time
0 = Input data sampled at middle of data output time
SPI Slave mode:
SMP must be cleared when SPI is used in Slave mode
In I²C Master or Slave mode:
1= Slew rate control disabled for Standard Speed mode (100 kHz and 1 MHz)
0= Slew rate control enabled for High Speed mode (400 kHz)
bit 6
CKE: SPI Clock Edge Select bit (Figure 9-2, Figure 9-3 and Figure 9-4)
SPI mode:
For CKP = 0
1 = Transmit happens on transition from active clock state to idle clock state
0 = Transmit happens on transition from idle clock state to active clock state
For CKP = 1
1 = Data transmitted on falling edge of SCK
0 = Data transmitted on rising edge of SCK
In I²C Master or Slave mode:
1 = Input levels conform to SMBus spec
0 = Input levels conform to I²C specs
bit 5
D/A: Data/Address bit (I²C mode only)
1 = Indicates that the last byte received or transmitted was data
0 = Indicates that the last byte received or transmitted was address
bit 4
P: STOP bit
(I²C mode only. This bit is cleared when the MSSP module is disabled, SSPEN is cleared.)
1 = Indicates that a STOP bit has been detected last (this bit is '0' on RESET)
0 = STOP bit was not detected last
bit 3
S: START bit
(I²C mode only. This bit is cleared when the MSSP module is disabled, SSPEN is cleared.)
1 = Indicates that a START bit has been detected last (this bit is '0' on RESET)
0 = START bit was not detected last
bit 2
R/W: Read/Write bit information (I²C mode only)
This bit holds the R/W bit information following the last address match. This bit is only valid from the
address match to the next START bit, STOP bit or not ACK bit.
In I²C Slave mode:
1 = Read
0 = Write
In I²C Master mode:
1 = Transmit is in progress
0 = Transmit is not in progress.
Logical OR of this bit with SEN, RSEN, PEN, RCEN or ACKEN will indicate if the MSSP is in IDLE
mode.
bit 1
UA: Update Address bit (10-bit I²C mode only)
1 = Indicates that the user needs to update the address in the SSPADD register
0 = Address does not need to be updated
bit 0
BF: Buffer Full Status bit
Receive (SPI and I²C modes):
1 = Receive complete, SSPBUF is full
0 = Receive not complete, SSPBUF is empty
Transmit (I²C mode only):
1 = Data Transmit in progress (does not include the ACK and STOP bits), SSPBUF is full
0 = Data Transmit complete (does not include the ACK and STOP bits), SSPBUF is empty
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
x = Bit is unknown
DS30221C-page 52
© 2006 Microchip Technology Inc.