PIC16F872_06 Datasheet, PDF (12/168 Pages) Microchip Technology – 28-Pin, 8-Bit CMOS Flash Microcontroller with 10-Bit A/D

PIC16F872
TABLE 2-1: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on: Details
POR,
on
BOR page:
Bank 1
80h⁽²⁾ INDF
Addressing this location uses contents of FSR to address data memory
(not a physical register)
0000 0000 21, 93
81h
82h⁽²⁾
83h⁽²⁾
84h⁽²⁾
85h
86h
87h
88h
89h
8Ah^(1,2)
8Bh⁽²⁾
8Ch
8Dh
OPTION_REG RBPU INTEDG T0CS
T0SE
PSA
PS2
PS1
PS0
PCL
Program Counter (PC) Least Significant Byte
STATUS
IRP
RP1
RP0
TO
PD
Z
DC
C
FSR
Indirect data memory address pointer
TRISA
—
— PORTA Data Direction Register
TRISB
PORTB Data Direction Register
TRISC
PORTC Data Direction Register
—
Unimplemented
—
Unimplemented
PCLATH
—
—
— Write Buffer for the upper 5 bits of the Program Counter
INTCON
GIE
PEIE TMR0IE INTE
RBIE TMR0IF INTF
RBIF
PIE1
(3)
ADIE
(3)
(3)
SSPIE CCP1IE TMR2IE TMR1IE
PIE2
—
(3)
—
EEIE
BCLIE
—
—
(3)
1111 1111
0000 0000
0001 1xxx
xxxx xxxx
--11 1111
1111 1111
1111 1111
—
—
---0 0000
0000 000x
r0rr 0000
-r-0 0--r
13, 94
20, 93
12, 93
21, 93
29, 94
31, 94
33, 94
—
—
20, 93
14, 93
15, 94
17, 94
8Eh
PCON
—
—
—
—
—
—
POR
BOR ---- --qq 19, 94
8Fh
—
Unimplemented
—
—
90h
—
Unimplemented
—
—
91h
SSPCON2
GCEN ACKSTAT ACKDT ACKEN RCEN
PEN
RSEN
SEN 0000 0000 54, 94
92h
PR2
93h
SSPADD
Timer2 Period Register
Synchronous Serial Port (I²C mode) Address Register
1111 1111 43, 94
0000 0000 58, 94
94h
SSPSTAT
SMP
CKE
D/A
P
S
R/W
UA
BF 0000 0000 52, 94
95h
—
Unimplemented
—
—
96h
—
Unimplemented
—
—
97h
—
Unimplemented
—
—
95h
—
Unimplemented
—
—
95h
—
Unimplemented
—
—
9Ah
—
Unimplemented
—
—
9Bh
—
Unimplemented
—
—
9Ch
—
Unimplemented
—
—
9Dh
—
Unimplemented
—
—
9Eh
ADRESL
A/D Result Register Low Byte
xxxx xxxx 84, 94
9Fh
ADCON1
ADFM
—
—
—
PCFG3 PCFG2 PCFG1 PCFG0 0--- 0000 80, 94
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as '0', r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose contents are
transferred to the upper byte of the program counter.
2: These registers can be addressed from any bank.
3: These bits are reserved; always maintain these bits clear.
DS30221C-page 10
© 2006 Microchip Technology Inc.