PIC16F872_06 Datasheet, PDF (35/168 Pages) Microchip Technology – 28-Pin, 8-Bit CMOS Flash Microcontroller with 10-Bit A/D

4.3 PORTC and the TRISC Register
PORTC is an 8-bit wide, bi-directional port. The corre-
sponding data direction register is TRISC. Setting a
TRISC bit (= ‘1’) will make the corresponding PORTC
pin an input (i.e., put the corresponding output driver in
a Hi-Impedance mode). Clearing a TRISC bit (= ‘0’) will
make the corresponding PORTC pin an output (i.e., put
the contents of the output latch on the selected pin).
PORTC is multiplexed with several peripheral functions
(Table 4-5). PORTC pins have Schmitt Trigger input
buffers.
When the I²C module is enabled, the PORTC (4:3) pins
can be configured with normal I²C levels or with SMBus
levels by using the CKE bit (SSPSTAT<6>).
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. Some
peripherals override the TRIS bit to make a pin an out-
put, while other peripherals override the TRIS bit to
make a pin an input. Since the TRIS bit override is in
effect while the peripheral is enabled, read-modify-
write instructions (BSF, BCF, XORWF) with TRISC as
the destination should be avoided. The user should
refer to the corresponding peripheral section for the
correct TRIS bit settings.
FIGURE 4-5:
PORTC BLOCK DIAGRAM
(PERIPHERAL OUTPUT
OVERRIDE) RC<2:0>
RC<7:5>
Port/Peripheral Select⁽²⁾
Peripheral Data Out
Data Bus
0
DQ
WR
PORT
1
CK Q
Data Latch
WR
TRIS
RD
TRIS
DQ
CK Q
TRIS Latch
Peripheral
OE⁽³⁾
Q
VDD
P
I/O pin⁽¹⁾
N
VSS
Schmitt
Trigger
D
RD
EN
PORT
Peripheral Input
Note 1:
2:
3:
I/O pins have diode protection to VDD and VSS.
Port/Peripheral select signal selects between port
data and peripheral output.
Peripheral OE (output enable) is only activated if
peripheral select is active.
PIC16F872
FIGURE 4-6:
PORTC BLOCK DIAGRAM
(PERIPHERAL OUTPUT
OVERRIDE) RC<4:3>
Port/Peripheral Select⁽²⁾
Peripheral Data Out
Data Bus
WR
PORT
0
DQ
1
CK Q
Data Latch
VDD
P
I/O
pin⁽¹⁾
WR
TRIS
RD
TRIS
DQ
CK Q
TRIS Latch
Peripheral
OE⁽³⁾
RD
PORT
SSPl Input
N
Vss
Schmitt
Trigger
QD
EN
Schmitt
Trigger
with
SMBus
0 ^Levels
1
CKE
SSPSTAT<6>
Note 1:
2:
3:
I/O pins have diode protection to VDD and VSS.
Port/Peripheral select signal selects between port data
and peripheral output.
Peripheral OE (output enable) is only activated if
peripheral select is active.
© 2006 Microchip Technology Inc.
DS30221C-page 33