PIC16F872_06 Datasheet, PDF(22/168 Page) Microchip Technology – 28-Pin, 8-Bit CMOS Flash Microcontroller with 10-Bit A/D

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PIC16F872_06 Datasheet, PDF (22/168 Pages) Microchip Technology – 28-Pin, 8-Bit CMOS Flash Microcontroller with 10-Bit A/D

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PIC16F872

2.3 PCL and PCLATH

The program counter (PC) is 13-bits wide. The low byte

comes from the PCL register, which is a readable and

writable register. The upper bits (PC<12:8>) are not

readable, but are indirectly writable through the

PCLATH register. On any RESET, the upper bits of the

PC will be cleared. Figure 2-3 shows the two situations

for the loading of the PC. The upper example in the fig-

ure shows how the PC is loaded on a write to PCL

(PCLATH<4:0> â PCH). The lower example in the fig-

ure shows how the PC is loaded during a CALL or GOTO

instruction (PCLATH<4:3> â PCH).

FIGURE 2-3:

LOADING OF PC IN

DIFFERENT SITUATIONS

PCH

PCL

PCLATH<4:0>

Instruction with

PCL as

Destination

ALU

PCLATH

PCH

12 11 10

2 PCLATH<4:3>

PCL

GOTO,CALL

Opcode <10:0>

PCLATH

2.3.1 COMPUTED GOTO

A computed GOTO is accomplished by adding an offset

to the program counter (ADDWF PCL). When doing a

table read using a computed GOTO method, care

should be exercised if the table location crosses a PCL

memory boundary (each 256 byte block). Refer to the

Application Note, âImplementing a Table Read"

(AN556).

2.3.2 STACK

The PIC16FXXX family has an 8-level deep x 13-bit

wide hardware stack. The stack space is not part of

either program or data space and the stack pointer is

not readable or writable. The PC is PUSHed onto the

stack when a CALL instruction is executed or an inter-

rupt causes a branch. The stack is POPed in the event

of a RETURN, RETLW or a RETFIE instruction execu-

tion. PCLATH is not affected by a PUSH or POP oper-

ation.

The stack operates as a circular buffer. This means that

after the stack has been PUSHed eight times, the ninth

push overwrites the value that was stored from the first

push. The tenth push overwrites the second push (and

so on).

Note 1: There are no status bits to indicate stack

overflow or stack underflow conditions.

2: There are no instructions/mnemonics

called PUSH or POP. These are actions

that occur from the execution of the

CALL, RETURN, RETLW and RETFIE

instructions, or the vectoring to an inter-

rupt address.

2.4 Program Memory Paging

All PIC16FXXX devices are capable of addressing a

continuous 8K word block of program memory. The

CALL and GOTO instructions provide only 11 bits of

address to allow branching within any 2K program

memory page. When doing a CALL or GOTO instruction,

the upper 2 bits of the address are provided by

PCLATH<4:3>. Since the PIC16F872 has only 2K

words of program memory or one page, additional code

is not required to ensure that the correct page is

selected before a CALL or GOTO instruction is exe-

cuted. The PCLATH<4:3> bits should always be main-

tained as zeros. If a return from a CALL instruction (or

interrupt) is executed, the entire 13-bit PC is popped off

the stack. Therefore, manipulation of the

PCLATH<4:3> bits are not required for the return

instructions (which POPs the address from the stack).

Note:

The contents of the PCLATH register are

unchanged after a RETURN or RETFIE

instruction is executed. The user must

rewrite the contents of the PCLATH regis-

ter for any subsequent subroutine calls or

GOTO instructions.

DS30221C-page 20

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