PIC16F872_06 Datasheet, PDF (164/168 Pages) Microchip Technology – 28-Pin, 8-Bit CMOS Flash Microcontroller with 10-Bit A/D

PIC16F872
Bus Collision During START Condition
(SCL = 0) ................................................... 75
Bus Collision During START Condition
(SDA Only) ................................................ 74
Capture/Compare/PWM .......................................... 131
CLKOUT and I/O ..................................................... 128
External Clock .......................................................... 127
First START Bit Timing .............................................. 65
I²C Bus Data ............................................................ 135
I²C Bus START/STOP Bits ...................................... 134
I²C Master Mode Transmission ................................. 68
, I²C Mode (7-bit Reception) ................................. 60 70
I²C Mode (7-bit Transmission) ................................... 61
Master Mode Transmit Clock Arbitration ................... 72
Power-up Timer ....................................................... 129
Repeat START Condition .......................................... 66
RESET ..................................................................... 129
Slave Mode General Call Address Sequence
(7 or 10-bit Mode) ...................................... 61
Slow Rise Time (MCLR Tied to VDD
Via RC Network) ........................................ 96
SPI Master Mode ....................................................... 56
SPI Master Mode (CKE = 0, SMP = 0) .................... 132
SPI Master Mode (CKE = 1, SMP = 1) .................... 132
, SPI Slave Mode (CKE = 0) ............................... 57 133
, SPI Slave Mode (CKE = 1) ............................... 57 133
Start-up Timer .......................................................... 129
STOP Condition Receive or Transmit Mode .............. 72
Time-out Sequence on Power-up .............................. 96
Time-out Sequence on Power-up
(MCLR Not Tied to VDD)
Case 1 ............................................................... 95
Case 2 ............................................................... 96
Time-out Sequence on Power-up
(MCLR Tied to VDD Via RC Network) ........ 95
Timer0 ...................................................................... 130
Timer1 ...................................................................... 130
Wake-up from SLEEP via Interrupt .......................... 101
Watchdog Timer ...................................................... 129
Timing Parameter Symbology ......................................... 126
, TMR0 Register .............................................................. 9 11
TMR1CS bit ....................................................................... 39
TMR1H Register .................................................................. 9
TMR1L Register ................................................................... 9
TMR1ON bit ....................................................................... 39
TMR2 Register ..................................................................... 9
TOUTPS3:TOUTPS0 bits .................................................. 43
TRISA Register .................................................................. 10
TRISB Register .................................................................. 10
TRISC Register .................................................................. 10
U
UA Bit
Update Address Bit (UA) ........................................... 52
W
, Wake-up from SLEEP ...............................................87 100
Interrupts ................................................................... 93
MCLR Reset .............................................................. 93
WDT Reset ................................................................ 93
Wake-Up Using Interrupts ............................................... 100
, Watchdog Timer (WDT) ..............................................87 99
Enable (WDTE Bit) .................................................... 99
Postscaler. See Postscaler, WDT
Programming Considerations .................................... 99
RC Oscillator ............................................................. 99
Time-out Period ......................................................... 99
, WDT Reset, Normal Operation ...........................91 93
, WDT Reset, SLEEP ............................................91 93
WDT Reset, Wake-up ............................................... 93
WCOL ................................................................................ 65
WCOL Bit .......................................................................... 53
WCOL Status Flag ........................................ 65, 67, 69, 71
Write Collision Detect Bit (WCOL) ..................................... 53
Write Verify
Data EEPROM and FLASH Program Memory .......... 27
WWW, On-Line Support ...................................................... 2
DS30221C-page 162
© 2006 Microchip Technology Inc.