PIC18F2450_08 Datasheet, PDF (50/324 Pages) Microchip Technology – 28/40/44-Pin, High-Performance, 12 MIPS, Enhanced Flash, USB Microcontrollers with nanoWatt Technology

PIC18F2450/4450
4.6 Reset State of Registers
Most registers are unaffected by a Reset. Their status
is unknown on POR and unchanged by all other
Resets. The other registers are forced to a “Reset
state” depending on the type of Reset that occurred.
Most registers are not affected by a WDT wake-up,
since this is viewed as the resumption of normal oper-
ation. Status bits from the RCON register, RI, TO, PD,
POR and BOR, are set or cleared differently in different
Reset situations as indicated in Table 4-3. These bits
are used in software to determine the nature of the
Reset.
Table 4-4 describes the Reset states for all of the
Special Function Registers. These are categorized by
Power-on and Brown-out Resets, Master Clear and
WDT Resets and WDT wake-ups.
TABLE 4-3: STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION
FOR RCON REGISTER
Condition
Program
RCON Register
STKPTR Register
Counter _{SBOREN RI TO PD POR BOR STKFUL STKUNF}
Power-on Reset
0000h
1
11100
0
0
RESET instruction
0000h
u⁽²⁾
0uuuu
u
u
Brown-out Reset
0000h
u⁽²⁾
111u0
u
u
MCLR Reset during power-managed 0000h
u⁽²⁾
u1uuu
u
u
Run modes
MCLR Reset during power-managed 0000h
u⁽²⁾
u10uu
u
u
Idle modes and Sleep mode
WDT time-out during full-power or
0000h
u⁽²⁾
u0uuu
u
u
power-managed Run modes
MCLR Reset during full-power
0000h
u⁽²⁾
uuuuu
u
u
execution
Stack Full Reset (STVREN = 1)
0000h
u⁽²⁾
uuuuu
1
u
Stack Underflow Reset
0000h
u⁽²⁾
uuuuu
u
1
(STVREN = 1)
Stack Underflow Error (not an actual 0000h
u⁽²⁾
uuuuu
u
1
Reset, STVREN = 0)
WDT time-out during power-managed PC + 2
u⁽²⁾
u00uu
u
u
Idle or Sleep modes
Interrupt exit from
PC + 2⁽¹⁾
u⁽²⁾
uu0uu
u
u
power-managed modes
Legend: u = unchanged
Note 1: When the wake-up is due to an interrupt and the GIEH or GIEL bit is set, the PC is loaded with the
interrupt vector (008h or 0018h).
2: Reset state is ‘1’ for POR and unchanged for all other Resets when software BOR is enabled
(BOREN1:BOREN0 Configuration bits = 01 and SBOREN = 1); otherwise, the Reset state is ‘0’.
DS39760D-page 48
© 2008 Microchip Technology Inc.