PIC18F2450_08 Datasheet, PDF (112/324 Pages) Microchip Technology – 28/40/44-Pin, High-Performance, 12 MIPS, Enhanced Flash, USB Microcontrollers with nanoWatt Technology

PIC18F2450/4450
TABLE 9-9: PORTE I/O SUMMARY
Pin
Function
TRIS
Setting
I/O
I/O Type
Description
RE0/AN5
RE0
0
OUT DIG LATE<0> data output; not affected by analog input.
1
IN
ST PORTE<0> data input; disabled when analog input enabled.
AN5
1
IN
ANA A/D input channel 5; default configuration on POR.
RE1/AN6
RE1
0
OUT DIG LATE<1> data output; not affected by analog input.
1
IN
ST PORTE<1> data input; disabled when analog input enabled.
AN6
1
IN
ANA A/D input channel 6; default configuration on POR.
RE2/AN7
RE2
0
OUT DIG LATE<2> data output; not affected by analog input.
1
IN
ST PORTE<2> data input; disabled when analog input enabled.
MCLR/VPP/
RE3
AN7
MCLR
VPP
RE3
1
IN
—⁽¹⁾
IN
— ⁽¹⁾
IN
— ⁽¹⁾
IN
ANA
ST
ANA
ST
A/D input channel 7; default configuration on POR.
External Master Clear input; enabled when MCLRE Configuration bit
is set.
High-voltage detection, used for ICSP™ mode entry detection.
Always available regardless of pin mode.
PORTE<3> data input; enabled when MCLRE Configuration bit
is clear.
Legend: OUT = Output, IN = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input.
Note 1: RE3 does not have a corresponding TRISE<3> bit. This pin is always an input regardless of mode.
TABLE 9-10: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on Page:
PORTE
—
—
—
LATE⁽³⁾
—
—
—
TRISE⁽³⁾
—
—
—
—
RE3^(1,2) RE2⁽³⁾
RE1⁽³⁾
RE0⁽³⁾
51
—
—
LATE2 LATE1 LATE0
51
—
—
TRISE2 TRISE1 TRISE0
51
ADCON1
—
—
VCFG1 VCFG0 PCFG3 PCFG2 PCFG1 PCFG0
50
Legend:
Note 1:
2:
— = unimplemented, read as ‘0’
Implemented only when Master Clear functionality is disabled (MCLRE Configuration bit = 0); otherwise,
read as ‘0’.
RE3 is the only PORTE bit implemented on both 28-pin and 40/44-pin devices. All other bits are
implemented only when PORTE is implemented (i.e., 40/44-pin devices).
3: These registers and/or bits are unimplemented on 28-pin devices.
DS39760D-page 110
© 2008 Microchip Technology Inc.