PIC18F2450_08 Datasheet, PDF (313/324 Pages) Microchip Technology – 28/40/44-Pin, High-Performance, 12 MIPS, Enhanced Flash, USB Microcontrollers with nanoWatt Technology

INDEX
A
A/D ................................................................................... 175
Acquisition Requirements ........................................ 180
ADCON0 Register .................................................... 175
ADCON1 Register .................................................... 175
ADCON2 Register .................................................... 175
ADRESH Register ............................................ 175, 178
ADRESL Register .................................................... 175
Analog Port Pins, Configuring .................................. 182
Associated Registers ............................................... 184
Configuring the Module ............................................ 179
Conversion Clock (TAD) ........................................... 181
Conversion Requirements ....................................... 294
Conversion Status (GO/DONE Bit) .......................... 178
Conversions ............................................................. 183
Converter Characteristics ........................................ 293
Converter Interrupt, Configuring .............................. 179
Discharge ................................................................. 183
Operation in Power-Managed Modes ...................... 182
Selecting and Configuring Acquisition Time ............ 181
Special Event Trigger (CCP1) .................................. 184
Use of the CCP1 Trigger .......................................... 184
Absolute Maximum Ratings ............................................. 267
AC (Timing) Characteristics ............................................. 283
Load Conditions for Device Timing
Specifications ................................................... 284
Parameter Symbology ............................................. 283
Temperature and Voltage Specifications ................. 284
Timing Conditions .................................................... 284
AC Characteristics
Internal RC Accuracy ............................................... 286
ADCON0 Register ............................................................ 175
GO/DONE Bit ........................................................... 178
ADCON1 Register ............................................................ 175
ADCON2 Register ............................................................ 175
ADDFSR .......................................................................... 256
ADDLW ............................................................................ 219
ADDULNK ........................................................................ 256
ADDWF ............................................................................ 219
ADDWFC ......................................................................... 220
ADRESH Register ............................................................ 175
ADRESL Register .................................................... 175, 178
Analog-to-Digital Converter. See A/D.
ANDLW ............................................................................ 220
ANDWF ............................................................................ 221
Assembler
MPASM Assembler .................................................. 264
Auto-Wake-up on Sync Break Character ......................... 167
B
BC .................................................................................... 221
BCF .................................................................................. 222
Block Diagrams
A/D ........................................................................... 178
Analog Input Model .................................................. 179
Capture Mode Operation ......................................... 124
Compare Mode Operation ....................................... 125
Device Clock .............................................................. 24
EUSART Receive .................................................... 165
EUSART Transmit ................................................... 163
External Power-on Reset Circuit
(Slow VDD Power-up) ......................................... 43
Fail-Safe Clock Monitor ............................................ 206
© 2008 Microchip Technology Inc.
PIC18F2450/4450
Generic I/O Port ......................................................... 99
High/Low-Voltage Detect with External Input .......... 186
Interrupt Logic ............................................................ 86
On-Chip Reset Circuit ................................................ 41
PIC18F2450 .............................................................. 10
PIC18F4450 .............................................................. 11
PLL (HS Mode) .......................................................... 26
PWM Operation (Simplified) .................................... 127
Reads from Flash Program Memory ......................... 77
Table Read Operation ............................................... 73
Table Write Operation ............................................... 74
Table Writes to Flash Program Memory .................... 79
Timer0 in 16-Bit Mode ............................................. 112
Timer0 in 8-Bit Mode ............................................... 112
Timer1 ..................................................................... 116
Timer1 (16-Bit Read/Write Mode) ............................ 116
Timer2 ..................................................................... 122
Typical External Transceiver with Isolation ............. 131
USB Interrupt Logic Funnel ..................................... 143
USB Peripheral and Options ................................... 129
USTAT FIFO ............................................................ 134
Watchdog Timer ...................................................... 203
BN .................................................................................... 222
BNC ................................................................................. 223
BNN ................................................................................. 223
BNOV .............................................................................. 224
BNZ ................................................................................. 224
BOR. See Brown-out Reset.
BOV ................................................................................. 227
BRA ................................................................................. 225
Brown-out Reset (BOR) ..................................................... 44
Detecting ................................................................... 44
Disabling in Sleep Mode ............................................ 44
Software Enabled ...................................................... 44
BSF .................................................................................. 225
BTFSC ............................................................................. 226
BTFSS ............................................................................. 226
BTG ................................................................................. 227
BZ .................................................................................... 228
C
C Compilers
MPLAB C18 ............................................................. 264
MPLAB C30 ............................................................. 264
CALL ................................................................................ 228
CALLW ............................................................................ 257
Capture (CCP Module) .................................................... 124
Associated Registers ............................................... 126
CCP1 Pin Configuration .......................................... 124
CCPR1H:CCPR1L Registers .................................. 124
Prescaler ................................................................. 124
Software Interrupt .................................................... 124
Capture/Compare/PWM (CCP) ....................................... 123
Capture Mode. See Capture.
CCP Mode and Timer Resources ............................ 124
CCPR1H Register ................................................... 124
CCPR1L Register .................................................... 124
Compare Mode. See Compare.
Module Configuration .............................................. 124
Clock Sources .................................................................... 30
Selection Using OSCCON Register .......................... 30
CLRF ............................................................................... 229
CLRWDT ......................................................................... 229
DS39760D-page 311