PIC18F86K22-I Datasheet, PDF (499/550 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers

PIC18F87K22 FAMILY
TABLE 31-1: MEMORY PROGRAMMING REQUIREMENTS
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C  TA  +85°C for industrial
-40°C  TA  +125°C for extended
Param
No.
Sym
Characteristic
Min
Typ† Max Units
Conditions
Internal Program Memory
Programming Specifications⁽¹⁾
D110 VPP Voltage on MCLR/VPP/RE5 pin VDD + 1.5 —
D113 IDDP Supply Current during
Programming
—
—
D120
D121
ED
VDRW
Data EEPROM Memory
Byte Endurance
VDD for Read/Write
100K
—
1.8
—
1.8
—
D122 TDEW Erase/Write Cycle Time
D123 TRETD Characteristic Retention
—
4
40
—
D124 TREF Number of Total Erase/Write
Cycles before Refresh⁽²⁾
1M
10M
10
V (Note 3, Note 4)
10 mA
(Note 2)
— E/W -40C to +125C
5.5
V Using EECON to read/
write, ENVREG tied to VDD
3.6
V Using EECON to read/
write, ENVREG tied to VSS
—
ms
— Year Provided no other
specifications are violated
— E/W -40°C to +125°C
Program Flash Memory
D130 EP Cell Endurance
10K
—
— E/W -40C to +125C
D131 VPR VDD for Read
1.8
—
5.5
V ENVREG tied to VDD
1.8
—
3.6
V ENVREG tied to VSS
D132B VPEW Voltage for Self-Timed Erase or
Write Operations
VDD
1.8
—
5.5
V ENVREG tied to VDD
D133A TIW Self-Timed Write Cycle Time
—
2
—
ms
D134 TRETD Characteristic Retention
40
—
— Year Provided no other
specifications are violated
D135 IDDP Supply Current during
Programming
—
—
10 mA
D140 TWE Writes per Erase Cycle
—
—
1
For each physical address
†
Note 1:
2:
3:
4:
Data in “Typ” column is at 3.3V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
These specifications are for programming the on-chip program memory through the use of table write
instructions.
Refer to Section 9.8 “Using the Data EEPROM” for a more detailed discussion on data EEPROM
endurance.
Required only if Single-Supply Programming is disabled.
The MPLAB^® ICD 2 does not support variable VPP output. Circuitry to limit the MPLAB ICD 2 VPP voltage
must be placed between the MPLAB ICD 2 and the target system when programming or debugging with
the MPLAB ICD 2.
 2011 Microchip Technology Inc.
DS39960D-page 499