PIC18F86K22-I Datasheet, PDF (245/550 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers

PIC18F87K22 FAMILY
19.0 CAPTURE/COMPARE/PWM
(CCP) MODULES
PIC18F87K22 family devices have seven CCP
(Capture/Compare/PWM) modules, designated CCP4
through CCP10. All the modules implement standard
Capture, Compare and Pulse-Width Modulation (PWM)
modes.
Note:
Throughout this section, generic references
are used for register and bit names that are
the same, except for an ‘x’ variable that
indicates the item’s association with the
specific CCP module. For example, the
control register is named CCPxCON and
refers to CCP4CON through CCP10CON.
Each CCP module contains a 16-bit register that can
operate as a 16-bit Capture register, a 16-bit Compare
register or a PWM Master/Slave Duty Cycle register.
For the sake of clarity, all CCP module operation in the
following sections is described with respect to CCP4,
but is equally applicable to CCP5 through CCP10.
Note:
The CCP9 and CCP10 modules are
disabled on the devices with 32 Kbytes of
program memory (PIC18FX5K22).
REGISTER 19-1: CCPxCON: CCPx CONTROL REGISTER (CCP4-CCP10 MODULES)⁽¹⁾
R/W-0
PxM1
bit 7
R/W-0
PxM0
R/W-0
DCxB1
R/W-0
DCxB0
R/W-0
CCPxM3⁽²⁾
R/W-0
CCPxM2⁽²⁾
R/W-0
CCPxM1⁽²⁾
R/W-0
CCPxM0⁽²⁾
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
bit 5-4
PxM<1:0>: PWM Output Configuration bits
If CCPxM<3:2> = 00, 01, 10:
xx = PxA is assigned as a capture/compare input/output; PxB, PxC and PxD are assigned as port pins
If CCPxM<3:2> = 11:
00 = Single output: PxA, PxB, PxC and PxD are controlled by steering
01 = Full-bridge output forward: PxD is modulated; PxA is active; PxB, PxC are inactive
10 = Half-bridge output: PxA, PxB are modulated with dead-band control; PxC and PxD are assigned
as port pins
11 = Full-bridge output reverse: PxB is modulated; PxC is active; PxA and PxD are inactive
DCxB<1:0>: PWM Duty Cycle bit 1 and bit 0 for CCPx Module
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two Least Significant bits (bit 1 and bit 0) of the 10-bit PWM duty cycle. The eight
Most Significant bits (DCx<9:2>) of the duty cycle are found in CCPRxL.
Note 1: The CCP9 and CCP10 modules are not available on devices with 32 Kbytes of program memory
(PIC18FX5K22).
2: CCPxM<3:0> = 1011 will only reset the timer and not start AN A/D conversion on CCPx match.
 2009-2011 Microchip Technology Inc.
DS39960D-page 245