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PIC18F86K22-I Datasheet, PDF (256/550 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers
PIC18F87K22 FAMILY
19.4.2 PWM DUTY CYCLE
The PWM duty cycle is specified to use CCP4, as an
example, by writing to the CCPR4L register and to the
CCP4CON<5:4> bits. Up to 10-bit resolution is avail-
able. The CCPR4L contains the eight MSbs and the
CCP4CON<5:4> bits contain the two LSbs. This 10-bit
value is represented by CCPR4L:CCP4CON<5:4>.
The following equation is used to calculate the PWM
duty cycle in time:
EQUATION 19-2:
PWM Duty Cycle = (CCPR4L:CCP4CON<5:4>) •
TOSC • (TMR2 Prescale Value)
CCPR4L and CCP4CON<5:4> can be written to at any
time, but the duty cycle value is not latched into
CCPR4H until after a match between PR2 and TMR2
occurs (that is, the period is complete). In PWM mode,
CCPR4H is a read-only register.
The CCPR4H register and a two-bit internal latch are
used to double-buffer the PWM duty cycle. This
double-buffering is essential for glitchless PWM
operation.
When the CCPR4H and two-bit latch match TMR2,
concatenated with an internal two-bit Q clock or two
bits of the TMR2 prescaler, the CCP4 pin is cleared.
The maximum PWM resolution (bits) for a given PWM
frequency is shown in Equation 19-3:
EQUATION 19-3:
PWM Resolution (max) = l--o---g--l--o---F-g--F----P--O----2W----S------CM---------bits
Note:
If the PWM duty cycle value is longer than
the PWM period, the CCP4 pin will not be
cleared.
TABLE 19-6: EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz
PWM Frequency
2.44 kHz 9.77 kHz 39.06 kHz 156.25 kHz 312.50 kHz 416.67 kHz
Timer Prescaler (1, 4, 16)
16
4
1
1
1
1
PR2 Value
FFh
FFh
FFh
3Fh
1Fh
17h
Maximum Resolution (bits)
10
10
10
8
7
6.58
19.4.3 SETUP FOR PWM OPERATION
To configure the CCP module for PWM operation,
using CCP4 as an example:
1. Set the PWM period by writing to the PR2
register.
2. Set the PWM duty cycle by writing to the
CCPR4L register and CCP4CON<5:4> bits.
3. Make the CCP4 pin an output by clearing the
appropriate TRIS bit.
4. Set the TMR2 prescale value, then enable
Timer2 by writing to T2CON.
5. Configure the CCP4 module for PWM operation.
TABLE 19-7: REGISTERS ASSOCIATED WITH PWM AND TIMERS
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
GIE/GIEH PEIE/GIEL TMR0IE INT0IE
RBIE
TMR0IF INT0IF
RBIF
RCON
PIR4
PIE4
IPR4
TRISB
TRISC
TRISE
Legend:
Note 1:
2:
IPEN
SBOREN
CM
RI
TO
PD
POR
BOR
CCP10IF(1) CCP9IF(1) CCP8IF CCP7IF CCP6IF CCP5IF CCP4IF CCP3IF
CCP10IE(1) CCP9IE(1) CCP8IE CCP7IE CCP6IE CCP5IE CCP4IE CCP3IE
CCP10IP(1) CCP9IP(1) CCP8IP CCP7IP CCP6IP CCP5IP CCP4IP CCP3IP
TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0
TRISE7 TRISE6 TRISE5 TRISE4 TRISE3 TRISE2 TRISE1 TRISE0
— = unimplemented, read as ‘0’. Shaded cells are not used by PWM or Timer2/4/6/8.
Unimplemented on devices with a program memory of 32 Kbytes (PIC18F65K22 and PIC18F85K22).
Unimplemented on 64-pin devices (PIC18F6XK22), read as ‘0’.
DS39960D-page 256
 2009-2011 Microchip Technology Inc.