PIC18F86K22-I Datasheet, PDF (15/550 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers

PIC18F87K22 FAMILY
TABLE 1-3: PIC18F6XK22 PINOUT I/O DESCRIPTIONS
Pin Name
Pin Number _{Pin Buffer}
QFN/TQFP ^{Type Type}
Description
MCLR/RG5
MCLR
RG5
7
Master Clear (input) or programming voltage (input).
I
ST
I
ST
This pin is an active-low Reset to the device.
General purpose, input only pin.
OSC1/CLKI/RA7
OSC1
CLKI
RA7
39
Oscillator crystal or external clock input.
I CMOS Oscillator crystal input.
I CMOS External clock source input. Always associated
with pin function, OSC1. (See related OSC1/CLKI,
OSC2/CLKO pins.)
I/O TTL
General purpose I/O pin.
OSC2/CLKO/RA6
OSC2
CLKO
RA6
40
Oscillator crystal or clock output.
O
—
Oscillator crystal output. Connects to crystal or
resonator in Crystal Oscillator mode.
O
—
In certain oscillator modes, OSC2 pin outputs CLKO,
which has 1/4 the frequency of OSC1 and denotes the
instruction cycle rate.
I/O TTL
General purpose I/O pin.
Legend:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I = Input
P = Power
I²C = I²C™/SMBus
CMOS
Analog
O
OD
= CMOS compatible input or output
= Analog input
= Output
= Open-Drain (no P diode to VDD)
Note 1:
2:
3:
4:
Default assignment for ECCP2 when the CCP2MX Configuration bit is set.
Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared.
Not available on PIC18F65K22 and PIC18F85K22 devices.
The CC6, CCP7, CCP8 and CCP9 pin placement depends on the setting of the ECCPMX Configuration bit
(CONFIG3H<1>).
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DS39960D-page 15