PIC18F86K22-I Datasheet, PDF(187/550 Page) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers

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PIC18F86K22-I Datasheet, PDF (187/550 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers

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PIC18F87K22 FAMILY

TABLE 12-16: SUMMARY OF REGISTERS ASSOCIATED WITH PORTH

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

PORTH(1)

LATH(1)

TRISH(1)

RH7

LATH7

TRISH7

RH6

LATH6

TRISH6

RH5

LATH5

TRISH5

RH4

LATH4

TRISH4

RH3

LATH3

TRISH3

ANCON1

ANSEL15 ANSEL14 ANSEL13 ANSEL12 ANSEL11

ANCON2

ANSEL23 ANSEL22 ANSEL21 ANSEL20 ANSEL19

ODCON2 CCP10OD(2) CCP9OD(2) CCP8OD CCP7OD CCP6OD

Note 1: Unimplemented on 64-pin devices (PIC18F6XK22), read as â0â.

2: Unimplemented on PIC18FX5K22 devices, read as â0â.

Bit 2

RH2

LATH2

TRISH2

ANSEL10

ANSEL18

CCP5OD

Bit 1

RH1

LATH1

TRISH1

ANSEL9

ANSEL17

CCP4OD

Bit 0

RH0

LATH0

TRISH0

ANSEL8

ANSEL16

CCP3OD

12.10 PORTJ, TRISJ and

LATJ Registers

Note: PORTJ is available only on 80-pin devices.

PORTJ is an 8-bit wide, bidirectional port. The

corresponding Data Direction and Output Latch registers

are TRISJ and LATJ.

All pins on PORTJ are implemented with Schmitt

Trigger input buffers. Each pin is individually

configurable as an input or output.

Note: These pins are configured as digital inputs

on any device Reset.

When the external memory interface is enabled, all of

the PORTJ pins function as control outputs for the inter-

face. This occurs automatically when the interface is

enabled by clearing the EBDIS control bit

(MEMCON<7>). The TRISJ bits are also overridden.

Each of the PORTJ pins has a weak internal pull-up.

The pull-ups are provided to keep the inputs at a known

state for the external memory interface while powering

up. A single control bit can turn off all the pull-ups. This

is performed by clearing bit, RJPU (PADCFG1<5>).

The weak pull-up is automatically turned off when the

port pin is configured as an output. The pull-ups are

disabled on any device Reset.

EXAMPLE 12-9: INITIALIZING PORTJ

CLRF

CLRF

MOVLW

MOVWF

PORTJ

LATJ

0CFh

TRISJ

; Initialize PORTJ by

; clearing output latches

; Alternate method

; to clear output latches

; Value used to

; initialize data

; direction

; Set RJ3:RJ0 as inputs

; RJ5:RJ4 as output

; RJ7:RJ6 as inputs

ï£ 2009-2011 Microchip Technology Inc.

DS39960D-page 187

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