PIC18F86K22-I Datasheet, PDF (186/550 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers

PIC18F87K22 FAMILY
TABLE 12-15: PORTH FUNCTIONS (CONTINUED)
Pin Name
Function
TRIS
Setting
I/O
I/O
Type
Description
RH4/CCP9/
P3C/AN12/
C2INC
RH4
CCP9
0
O
DIG LATH<4> data output.
1
I
ST PORTH<4> data input.
0
O
DIG CCP9 compare/PWM output; takes priority over port data.
1
I
ST CCP9 capture input.
P3C
0
O
— ECCP3 PWM Output C.
May be configured for tri-state during Enhanced PWM.
AN12
1
I
ANA A/D Input Channel 12.
Default input configuration on POR; does not affect digital input.
C2INC
x
I
ANA Comparator 2 Input C.
RH5/CCP8/
P3B/AN13/
C2IND
RH5
CCP8
0
O
DIG LATH<5> data output.
1
I
ST PORTH<5> data input.
0
O
DIG CCP8 compare/PWM output; takes priority over port data.
1
I
ST CCP8 capture input.
P3B
0
O
— ECCP3 PWM Output B.
May be configured for tri-state during Enhanced PWM.
AN13
1
I
ANA A/D Input Channel 13.
Default input configuration on POR; does not affect digital input.
C2IND
x
I
ANA Comparator 2 Input D.
RH6/CCP7/
P1C/AN14/
C1INC
RH6
CCP7
0
O
DIG LATH<6> data output.
1
I
ST PORTH<6> data input.
0
O
DIG CCP7 compare/PWM output; takes priority over port data.
1
I
ST CCP7 capture input.
P1C
0
O
— ECCP1 PWM Output C.
May be configured for tri-state during Enhanced PWM.
AN14
1
I
ANA A/D Input Channel 14.
Default input configuration on POR; does not affect digital input.
C1INC
x
I
ANA Comparator 1 Input C.
RH7/CCP6/
P1B/AN15
RH7
0
O
DIG LATH<7> data output.
1
I
ST PORTH<7> data input.
CCP6
0
O
DIG CCP6 compare/PWM output; takes priority over port data.
1
I
ST CCP6 capture input.
P1B
0
O
— ECCP1 PWM Output B.
May be configured for tri-state during Enhanced PWM.
AN15
1
I
ANA A/D Input Channel 15.
Default input configuration on POR; does not affect digital input.
Legend: O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
DS39960D-page 186
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