PIC18F86K22-I Datasheet, PDF (23/550 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers

PIC18F87K22 FAMILY
TABLE 1-3: PIC18F6XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number _{Pin Buffer}
QFN/TQFP ^{Type Type}
Description
VSS
9, 25, 41, 56 P
— Ground reference for logic and I/O pins.
VDD
26, 38, 57 P
— Positive supply for logic and I/O pins.
AVSS
20
P
— Ground reference for analog modules.
AVDD
19
P
— Positive supply for analog modules.
ENVREG
18
I
ST Enable for on-chip voltage regulator.
VDDCORE/VCAP
VDDCORE
VCAP
10
Core logic power or external filter capacitor connection.
P
—
External filter capacitor connection (regulator
enabled/disabled).
Legend:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I = Input
P = Power
I²C = I²C™/SMBus
CMOS
Analog
O
OD
= CMOS compatible input or output
= Analog input
= Output
= Open-Drain (no P diode to VDD)
Note 1:
2:
3:
4:
Default assignment for ECCP2 when the CCP2MX Configuration bit is set.
Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared.
Not available on PIC18F65K22 and PIC18F85K22 devices.
The CC6, CCP7, CCP8 and CCP9 pin placement depends on the setting of the ECCPMX Configuration bit
(CONFIG3H<1>).
 2009-2011 Microchip Technology Inc.
DS39960D-page 23