PIC18F86K22-I Datasheet, PDF (142/550 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Enhanced Flash Microcontrollers

PIC18F87K22 FAMILY
FIGURE 11-1:
PIC18F87K22 FAMILY INTERRUPT LOGIC
PIR1<7:0>
PIE1<7:0>
IPR1<7:0>
PIR2<7,5:0>
PIE2<7,5:0>
IPR2<7,5:0>
PIR3<7,5>
PIE3<7,5>
IPR3<7,5>
PIR4<7:0>
PIE4<7:0>
IPR4<7:0>
PIR5<7:0>
PIE5<7:0>
IPR5<7:0>
PIR6<4, 2:0>
PIE6<4, 2:0>
IPR6<4, 2:0>
High-Priority Interrupt Generation
Low-Priority Interrupt Generation
TMR0IF
TMR0IE
TMR0IP
RBIF
RBIE
RBIP
INT0IF
INT0IE
INT1IF
INT1IE
INT1IP
INT2IF
INT2IE
INT2IP
INT3IF
INT3IE
INT3IP
IPEN
IPEN
PEIE/GIEL
IPEN
PIR1<7:0>
PIE1<7:0>
IPR1<7:0>
PIR2<7, 5:0>
PIE2<7, 5:0>
IPR2<7, 5:0>
PIR3<7, 5:0>
PIE3<7, 5:0>
IPR3<7, 5:0>
PIR4<7:0>
PIE4<7:0>
IPR4<7:0>
PIR5<7:0>
PIE5<7:0>
IPR5<7:0>
PIR6<4, 2:0>
PIE6<4, 2:0>
IPR6<4, 2:0>
TMR0IF
TMR0IE
TMR0IP
RBIF
RBIE
RBIP
INT1IF
INT1IE
INT1IP
INT2IF
INT2IE
INT2IP
INT3IF
INT3IE
INT3IP
Wake-up if in
Idle or Sleep modes
Interrupt to CPU
Vector to Location
0008h
GIE/GIEH
IPEN
Interrupt to CPU
Vector to Location
0018h
GIE/GIEH
PEIE/GIEL
DS39960D-page 142
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