MAX14830 Datasheet, PDF (55/68 Pages) Maxim Integrated Products – Quad Serial UART with 128-Word FIFOs

MAX14830
Quad Serial UART with 128-Word FIFOs
TxSynch—Transmitter Synchronization Register
ADDRESS:
MODE:
BIT
7
NAME CLKtoGPIO
RESET
0
0x20
R/W
6
TxAutoDis
0
5
TrigDelay
0
4
SynchEn
0
3
TrigSel3
0
2
TrigSel2
0
1
TrigSel1
0
0
TrigSel0
0
The TxSynch register is used to configure transmitter synchronization with a global SPI or I²C command. One of 16
trigger commands (Table 5) can be selected to be the synchronization trigger source for every UART. This allows
simultaneous start of transmission of multiple UARTs that are associated with the same global trigger command. The
synchronized UARTs can be on a single MAX14830 or on multiple devices if they are controlled by a common SPI
interface.
UARTs start transmission when a global trigger command is received. Start of transmission is considered to be the
falling edge of the START bit at the TX_ output. A delay can optionally be programmed through the SynchDelay1 and
SynchDelay2 registers.
Tx synchronization is managed through software by transmitting the broadcast trigger Tx command (Table 5) to the
MAX14830 through the SPI or I²C interface. To selectively synchronize ports that are on the same MAX14830 (Intrachip
Synchronization) or on different MAX14830 (Interchip Synchronization) devices, up to 16 trigger Tx commands have
been defined (see the GloblComnd section for more information).
Bit 7: CLKtoGPIO
The CLKtoGPIO bit is used to provide a buffered replica of the UARTs system clock (i.e. the fractional divider input) to
a GPIO. The assignment is as follows: UART0’s clock is routed to GPIO0, UART1’s clock is routed to GPIO4, UART2’s
clock is routed to GPIO8, and UART3’s clock is routed to GPIO12.
Bit 6: TxAutoDis
Set the TxAutoDis bit to 1 to enable automatic transmitter disabling. When TxAutoDis is 1, the transmitter is automati-
cally disabled when all data in the TxFIFO has been transmitted. After the transmitter is disabled, the TxFIFO can then
be filled with data that is transmitted when its assigned trigger command, defined by the TrigSelx bits, is received.
Bit 5: TrigDelay
Set TrigDelay to 1 to enable delayed start of transmission. The UART starts transmitting data following a delay pro-
grammed in SynchDelay1 and SynchDelay2 after receiving the assigned trigger command.
Bit 4: SynchEn
Set SynchEn to 1 to enable the software Tx synchronization. When SynchEn is high, the UART starts transmitting data
after receiving the expected trigger command, if the TxFIFO contains data. Setting SynchEn high forces the TxDisabl
bit (MODE1[1]) high and thereby disables the UART’s transmitter. This prevents the transmitter from sending data as
soon as the TxFIFO contains some. Once the TxFIFO has been loaded, the UART starts transmitting data only upon
receiving the assigned trigger command.
Set SynchEn to 0 to disable transmitter synchronization for that UART. When SynchEn is 0, that UART’s transmitter does
not start transmission through any trigger command.
Bits 3–0: TrigSel[n]
The TrigSel[n] bits select the trigger command for that UART’s transmitter synchronization when SynchEn is 1. For
example, set TxSynch[3:0] to 0x08 for the UART to be triggered by TX command 8 (0xE8, Table 5).
Maxim Integrated
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