MAX14830 Datasheet, PDF (21/68 Pages) Maxim Integrated Products – Quad Serial UART with 128-Word FIFOs

MAX14830
Quad Serial UART with 128-Word FIFOs
Fractional Baud-Rate Generators
The internal fractional baud-rate generator provides a
high degree of flexibility and high resolution in baud-
rate programming. The baud-rate generator has a 16-bit
integer divisor and a 4-bit word for the fractional divisor.
The fractional baud-rate generator can be used with the
external crystal or clock source.
The integer and fractional divisors are calculated through
the divisor, D:
D=
f_REF
16 × BaudRate
where fREF is the reference frequency input to the baud-
rate generator and D is the ideal divisor. In 2x and 4x rate
modes, replace the divisor 16 by 8 or 4, respectively.
The integer divisor portion, DIV, of the divisor, D, is
obtained by truncating D:
DIV = TRUNC(D)
DIV can be a maximum of 16 bits wide and is pro-
grammed into the 2-byte-wide registers DIVMSB and
DIVLSB. The minimum allowed value for DIVLSB is 1.
The fractional portion of the divisor, FRACT, is a 4-bit
nibble, which is programmed into BRGConfig[3:0]. The
maximum value is 15, allowing the divisor to be pro-
grammed with a resolution of 0.0625. FRACT is calcu-
lated as:
FRACT = ROUND(16 x (D-DIV)).
The following is an example of calculating the divisor.
It is based on a required baud rate of 190kbaud and a
reference input frequency of 28.23MHz and default rate
mode.
The ideal divisor is calculated as:
D = 28,230,000 / (16 x 190,000) = 9.286
hence DIV = 9.
FRACT = ROUND(4.579) = 0x05
so that DIVMSB = 0x00, DIVLSB = 0x09, and
BRGConfig[3:0] = 0x05.
The resulting actual baud rate can be calculated as:
BR _ACTUAL
=
16
f_REF
× D _ACTUAL
For this example: DACTUAL = 9 + 5/16 = 9.313, where
DACTUAL = DIV + (FRACT/16) and
BRACTUAL= 28,230,000 / (16 x 9.3125) = 189,463.087
baud.
Thus the baud rate is within 0.28% of the ideal rate.
2x and 4x Rate Modes
To support higher baud rates than possible with stan-
dard (16x sampling) operation, the MAX14830 offers 2x
and 4x rate modes. In this case, the reference clock rate
only needs to be either 8x or 4x of the baud rate, respec-
tively. In 4x mode only, the bits are only sampled once,
at the midbit instant, instead of the usual three samples
to determine the logic value of the bits. This reduces the
tolerance to line noise on the received data. The 2x and
4x modes are selectable through BRGConfig[5:4]. Note
that IrDA encoding and decoding does not operate in 2x
and 4x modes.
When 2x rate mode is selected, the actual baud rate is
twice the rate programmed into the baud-rate genera-
tor. If 4x rate mode is enabled, the actual baud rate on
the line is quadruple that of the programmed baud rate
(Figure 8).
DIVLSB
DIVMSB
FRACT
BRGConfig[5:4]
FRACTIONAL
f_REF
RATE
GENERATOR
RATE MODE
SELECTION
NOTE: IrDA DOES NOT WORK IN 2x AND 4x MODES.
Figure 8. 2x and 4x Baud Rates
1 x BAUD RATE,
2 x BAUD RATE,
4 x BAUD RATE
Maxim Integrated
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