MAX14830 Datasheet, PDF (16/68 Pages) Maxim Integrated Products – Quad Serial UART with 128-Word FIFOs

MAX14830
Quad Serial UART with 128-Word FIFOs
PIN
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
16  
NAME
VL
DGND
GPIO0
GPIO1
GPIO2
GPIO3
RTS0
CTS0
RX0
TX0
GPIO4
GPIO5
GPIO6
GPIO7
RTS1
CTS1
RX1
TX1
GPIO8
Pin Description (continued)
FUNCTION
Digital Interface Logic-Level Supply. VL powers the internal logic-level translators for RST, IRQ, MOSI/
A1, CS/A0, SCLK/SCL, MISO/SDA, LDOEN, and SPI/I2C. Bypass VL with a 0.1FF ceramic capacitor to
DGND.
Digital Ground
General-Purpose Input/Output 0. GPIO0 is user-programmable as an input or output (push-pull or open
drain) or external event interrupt source. GPIO0 has a weak pulldown resistor to ground. GPIO0 is the
reference clock output when bit 7 of the TxSynch register is set to 1 (see the UART Clock to GPIO sec-
tion for more information).
General-Purpose Input/Output 1. GPIO1 is user-programmable as an input or output (push-pull or open
drain) or external event interrupt source. GPIO1 has a weak pulldown resistor to ground. GPIO1 is the
TIMER output when bit 7 of the TIMER2 register is set to 1.
General-Purpose Input/Output 2. GPIO2 is user-programmable as an input or output (push-pull or open
drain) or external event interrupt source. GPIO2 has a weak pulldown resistor to ground.
General-Purpose Input/Output 3. GPIO3 is user-programmable as an input or output (push-pull or open
drain) or external event interrupt source. GPIO3 has a weak pulldown resistor to ground.
Active-Low Request-to-Send Output for UART0. RTS0 can be set high or low by programming the LCR
register. RTS0 is the UART system clock/fractional divider output when bit 7 of the CLKSource register
is set to 1.
Active-Low Clear-to-Send Input for UART0. CTS0 is a flow control status input.
Serial Receiving Data Input for UART0. RX0 has a weak pullup to VEXT.
Serial Transmitting Data Output for UART0
General-Purpose Input/Output 4. GPIO4 is user-programmable as an input or output (push-pull or open
drain) or external event interrupt source. GPIO4 has a weak pulldown resistor to ground. GPIO4 is the
reference clock output when bit 7 of the TxSynch register is set to 1 (see the UART Clock to GPIO sec-
tion for more information).
General-Purpose Input/Output 5. GPIO5 is user-programmable as an input or output (push-pull or open
drain) or external event interrupt source. GPIO5 has a weak pulldown resistor to ground. GPIO5 is the
TIMER output when bit 7 of the TIMER2 register is set to 1.
General-Purpose Input/Output 6. GPIO6 is user-programmable as an input or output (push-pull or open
drain) or external event interrupt source. GPIO6 has a weak pulldown resistor to ground.
General-Purpose Input/Output 7. GPIO7 is user-programmable as an input or output (push-pull or open
drain) or external event interrupt source. GPIO7 has a weak pulldown resistor to ground.
Active-Low Request-to-Send Output for UART1. RTS1 can be set high or low by programming the LCR
register. RTS1 is the UART system clock/fractional divider output when bit 7 of the CLKSource register
is set to 1.
Active-Low Clear-to-Send Input for UART1. CTS1 is a flow control status input.
Serial Receiving Data Input for UART1. RX1 has a weak pullup to VEXT.
Serial Transmitting Data Output for UART1
General-Purpose Input/Output 8. GPIO8 is user-programmable as an input or output (push-pull or open
drain) or external event interrupt source. GPIO8 has a weak pulldown resistor to ground. GPIO8 is the
reference clock output when bit 7 of the TxSynch register is set to 1 (see the UART Clock to GPIO sec-
tion for more information).
Maxim Integrated