MAX14830 Datasheet, PDF (24/68 Pages) Maxim Integrated Products – Quad Serial UART with 128-Word FIFOs

MAX14830
Quad Serial UART with 128-Word FIFOs
SCLK
UNCERTAINTY
INTERVAL
TX_
tTRIG_MIN
tTRIG_MAX
Figure 12. Single Transmitter Trigger Accuracy
Trigger Accuracy
The delay between the time when the MAX14830
receives a trigger command and the time when the
associated transmitter starts transmission is made up
of a fixed, deterministic portion and a variable, random
component. Both portions of the delay are dependent on
the UART’s clock and baud rates. When the fractional
divider is not used, the intrinsic trigger delay, tTRIG, is
bounded by the following limits:
5
× BR
16
≤
t
TRIG
≤
6
× BR
16
where BR is the fractional divider output clock period.
This equation is independent on the rate mode. The
reference point is the time when the trigger command is
received by the MAX14830. This occurs on the final (i.e.
the 16th) SPI clock’s low-to-high transition (Figure 12).
When the fractional baud-rate generator is used, the
random portion is larger than one UART clock period.
Synchronization Accuracy
When synchronizing multiple UART transmitters, the
accuracy of the TX_ transmitter outputs is based on the
triggering delays of each UART (Figure 13). This skew
has a baud-rate dependent component, similar to the
trigger accuracy equation for a single transmitter output.
Calculate the TX_ transmitter output skew using the fol-
lowing equation:
t
TRIGSKEW ^(max)
≤
6
×
BR_S − 5
16
×
BR_F
where BRS is the fractional divider output clock of the
lower/slower baud-rate UART and BRF is the fractional
divider output clock of the higher/faster baud-rate UART.
Auto Transmitter Disable
The MAX14830 allows automatic disabling of the trans-
mitter. Enable auto transmitter disabling functionality by
setting TxSynch[4] to 1. When auto transmitter disabling
is activated, the MAX14830 disables the specified
transmitter after it completes sending all the data in its
TxFIFO. New data can then be loaded into the TxFIFO. A
disabled transmitter does not send out data on the TX_
output when data is present in its TxFIFO.
To enable transmission, either clear the TxAutoDis bit
in the TxSynch register or toggle the TxDisabl bit in the
MODE1 register.
Echo Suppression
The MAX14830 can suppress echoed data, sometimes
found in half-duplex communication (e.g. RS-485 and
IrDA). If the transceiver’s receiver is not turned off while
the transceiver is transmitting, copies (echoes) are
received by the UART. The MAX14830’s receiver can
block the reception of this echoed data by enabling echo
suppression. Set MODE2[7]: EchoSuprs to 1 to enable
echo suppression.
The MAX14830 receiver can block echoes with a long
round trip delay. The transmitter can be configured to
remain enabled after the end of transmission for a pro-
grammable period of time: the hold time delay (Figure
14). The hold time delay is set by the HDplxDelay[3:0]
register. See the HDplxDelay Register section for more
information.
24  
Maxim Integrated