MAX14830 Datasheet, PDF (50/68 Pages) Maxim Integrated Products – Quad Serial UART with 128-Word FIFOs

MAX14830
Quad Serial UART with 128-Word FIFOs
GPIOData—GPIO Data Register
ADDRESS:
MODE:
BIT
7
NAME GPI3Dat
RESET
0
0x19
R/W
6
GPI2Dat
0
5
GPI1Dat
0
4
GPI0Dat
0
3
GPO3Dat
0
2
GPO2Dat
0
1
GPO1Dat
0
0
GPO0Dat
0
Bits 7–4: GPI[n]Dat
Each UART has four individually assigned GPIO outputs as follows: UART0: GPIO0–GPIO3, UART1: GPIO4–GPIO7,
UART2: GPIO8–GPIO11, UART3: GPIO12–GPIO15. For example, for UART0: Bit 4 is GPI0Dat, Bit 5 is GPI1Dat, Bit 6 is
GPI2Dat, and Bit 7 is GPI3Dat (see Table 6).
The GPI[n]Dat bits reflect the logic on the GPIO_s.
Bits 3–0: GPO[n]Dat
Each UART has four individually assigned GPIO outputs as follows: UART0: GPIO0–GPIO3, UART1: GPIO4–GPIO7,
UART2: GPIO8–GPIO11, UART3: GPIO12–GPIO15. For example, for UART0: Bit 0 is GPO0Dat, Bit 1 is GPO1Dat, Bit
2 is GPO2Dat, and Bit 3 is GPO3Dat (see Table 6).
The GPO[n]Dat bits allow programming the logic state of the GPIO_, when configured as outputs in GPIOConfg[3:0].
For open-drain operation, pullup resistors are needed on GPIO_.
Table 6. UART GPIO Assignments for GPIO Input/Output Data
UART
UART0
UART1
UART2
UART3
GPI3Dat/GPO3Dat
GPIO3
GPIO7
GPIO11
GPIO15
GPI2Dat/GPO2Dat
GPIO2
GPIO6
GPIO10
GPIO14
GPI1Dat/GPO1Dat
GPIO1
GPIO5
GPIO9
GPIO13
GPI0Dat/GPO0Dat
GPIO0
GPIO4
GPIO8
GPIO12
50  
Maxim Integrated