MAX14830 Datasheet, PDF (46/68 Pages) Maxim Integrated Products – Quad Serial UART with 128-Word FIFOs

MAX14830
Quad Serial UART with 128-Word FIFOs
Table 4. SwFlow_ Truth Table
SwFlow3 SwFlow2 SwFlow1 SwFlow0
RECEIVER FLOW
CONTROL
TRANSMITTER FLOW
CONTROL/SPECIAL
CHARACTER
DETECTION
0
0
0
0
0
0
X
X
1
0
X
X
0
1
X
X
1
1
X
X
X
X
0
0
X
X
1
0
X
X
0
1
X
X
1
1
X = Don’t care.
DESCRIPTION
No flow control. No character detection.
No receiver flow control.
Transmitter generates XON1, XOFF1.
Transmitter generates XON2, XOFF2.
Transmitter generates XON1, XON2, XOFF1, and XOFF2.
No transmitter flow control.
Receiver compares XON1 and XOFF1 and controls the transmitter accord-
ingly. XON1 and XOFF1 special character detection.
Receiver compares XON2 and XOFF2 and controls the transmitter accord-
ingly. XON2 and XOFF2 special character detection.
Receiver compares XON1, XON2, XOFF1, and XOFF2 and controls the
transmitter accordingly. XON1, XON2, XOFF1, XOFF2 special character
detection.
Bit 2: GPIAddr
The GPIAddr bit, when set, enables that the four GPIO_ inputs are used in conjunction with XOFF2 for the definition of
a special character. This can be used, for example, for defining the address of a RS-485 slave device through hard-
ware. The GPIO_ input logic levels define the four LSBs of the special character, while the four MSBs are defined by
the XOFF2[7:4] bits. If GPIAddr is set, the contents of the XOFF2[3:0] bits are neglected. In this case, the XOFF2[3:0]
bits, when read, also do not reflect the logic on GPIO_.
Bit 1: AutoCTS
The AutoCTS bit enables automatic CTS flow control by which the transmitter stops and starts sending data depend-
ing on the logic state at the CTS_ input. See the Auto Hardware Flow Control section for a description of AutoCTS
flow control. Logic changes at the CTS_ input result in an ISR[7]: CTSInt interrupt. The transmitter must be turned off,
(MODE1[1] = 1), before AutoCTS is enabled.
Bit 0: AutoRTS
The AutoRTS bit enables automatic RTS flow control by which the MAX14830 sets its RTS_ output dependent on the
Receive FIFO fill level. The FIFO thresholds at which RTS_ changes state are set in FlowLvl. See the Auto Hardware
Flow Control section for more information.
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Maxim Integrated