MAX14830 Datasheet, PDF (39/68 Pages) Maxim Integrated Products – Quad Serial UART with 128-Word FIFOs

MAX14830
Quad Serial UART with 128-Word FIFOs
MODE1 Register
ADDRESS:
MODE:
BIT
7
NAME IRQSel
RESET
0
0x09
R/W
6
—
0
5
4
3
2
1
0
—
TrnscvCtrl
RTSHiZ
TxHiZ
TxDisabl
RxDisabl
0
0
0
0
0
0
Bit 7: IRQSel
Depending on the logic level of the IRQSel bit, IRQ has different meanings. After a hardware or software (MODE2[0])
reset, the IRQSel bit is set low and, after a short delay, the IRQ output signals the end of the power-up sequence. The
IRQ is low during power-up and transitions to high when the MAX14830 is ready to be programmed.
IRQSel can then be set high. In this case, IRQ becomes a regular interrupt output that signals pending interrupts, as
indicated in the ISR. Details of the IRQSel are described in the Power-up and IRQ section.
Bits 6, 5: No Function
Bit 4: TrnscvCtrl
This bit enables the automatic transceiver direction control. Set TrnscvCtrl high so that RTS_ automatically controls the
transceiver’s transmit/receive enable/disable inputs. Setting TrnscvCtrl high sets RTS_ low so that the transceiver is
in receive mode. When the TxFIFO contains data available for transmission, the auto direction control sets RTS_ high
before the transmitter sends out the data. When the transmitter is empty, RTS_ is automatically forced low again.
Setup and hold times of RTS_ with respect to the TX_ output can be defined through the HDplxDelay register. A trans-
mitter empty interrupt ISR[5] is generated when the transmitter is empty.
Bit 3: RTSHiZ
Set the RTSHiZ bit high to three-state RTS_.
Bit 2: TxHiZ
Set the TxHiZ bit high to three-state the TX_ output.
Bit 1: TxDisabl
Set the TxDisabl bit high to disable transmission. If the TxDisabl bit is set high during transmission, the transmitter com-
pletes sending out the current character and then ceases transmission. Data still present in the Transmit FIFO remains
in the TxFIFO. The TX_ output is set to logic-high after transmission.
In auto transmitter disable mode, TxDisabl is high when the transmitter is completely empty.
Bit 0: RxDisabl
Set the RxDisabl bit high to disable the receiver of the selected UART so that the receiver stops receiving data. All data
present in the Receive FIFO remains in the RxFIFO.
Maxim Integrated
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