MV78100 Datasheet, PDF (81/124 Pages) –

Electrical Specifications
9.6.6
SDRAM DDR2 Interface AC Timing
9.6.6.1
SDRAM DDR2 400 MHz Interface AC Timing Table
Table 36: SDRAM DDR2 400 MHz Interface AC Timing Table
De s cr iption
Clock frequency
DQ and DM valid output time bef ore DQS transition
DQ and DM valid output time af ter DQS transition
DQ and DM output pulse w idth
DQS output high pulse w idth
DQS output low pulse w idth
DQS falling edge to CLK-CLKn rising edge
DQS f alling edge f rom CLK-CLKn rising edge
CLK-CLKn rising edge to DQS output rising edge
DQS w rite preamble
DQS w rite postamble
CLK-CLKn high-level w idth
CLK-CLKn low -level w idth
DQ input setup time relative to DQS in transition
DQ input hold time relative to DQS in transition
Address and control output pulse w idth
Sym bol
f CK
tDOVB
tDOVA
tDIPW
tDQSH
tDQSL
tDSS
tDSH
tDQSS
tWPRE
tWPST
tCH
tCL
tDSI
tDHI
tIPW
400 MHz @ 1.8V
M in
M ax
400.0
0.38
-
0.38
-
0.35
-
0.35
-
0.35
-
0.34
-
0.34
-
-0.11
0.11
0.35
-
0.41
-
0.48
0.52
0.48
0.52
-0.40
-
0.60
-
0.67
-
Units Notes
MHz
-
ns
-
ns
-
tCK(avg) -
tCK(avg) -
tCK(avg) -
tCK(avg) 1
tCK(avg) 1
tCK(avg) -
tCK(avg) -
tCK(avg) -
tCK(avg) 1, 2, 3
tCK(avg) 1, 2, 4
ns
-
ns
-
tCK(avg) -
Note s :
General comment: All timing values w ere measured from vref to vref, unless otherw ise specified.
General comment: All input timing values assume minimum slew rate of 1 V/ns (slew rate measured f rom Vref +/-125 mV).
General comment: All timing parameters w ith DQS signal are defined on DQS-DQSn crossing point.
General comment: For Address and Control output timing parameters, refer to the Address Timing table.
General comment: tCK = 1/fCK.
General comment: For all signals, the load is CL = 14 pF.
1. This timing value is defined on CLK / CLKn crossing point.
2. Ref er to SDRAM DDR2 clock specif ications table f or more inf ormation.
3. tCH(avg) is defined as the average HIGH pulse w idth, as calculated across any consecutive 200 HIGH pulses.
4. tCL(avg) is defined as the average LOW pulse w idth, as calculated across any consecutive 200 LOW pulses.
Copyright © 2008 Marvell
December 6, 2008, Preliminary
Document Classification: Proprietary Information
MV-S104552-U0 Rev. D
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