MV78100 Datasheet, PDF (100/124 Pages) –

MV78100
Hardware Specifications
9.6.10 JTAG Interface AC Timing
9.6.10.1 JTAG Interface AC Timing Table
Table 49: JTAG Interface 30 MHz AC Timing Table
De s cr iption
JTClk frequency
JTClk minimum pulse w idth
JTClk rise/fall slew rate
JTRSTn active time
TMS, TDI input setup relative to JTClk rising edge
TMS, TDI input hold relative to JTClk rising edge
JTClk falling edge to TDO output delay
Sym bol
f CK
Tpw
Sr/Sf
Trst
Tsetup
Thold
Tprop
30 MHz
M in
M ax
30.0
0.45
0.55
0.50
-
1.0
-
6.67
-
13.0
-
1.0
8.33
Units
MHz
tCK
V/ns
ms
ns
ns
ns
Note s
-
-
2
-
-
-
1
Note s :
General comment: All values w ere measured from vddio/2 to vddio/2, unless otherw ise specified.
General comment: tCK = 1/fCK.
1. For TDO signal, the load is CL = 10 pF.
2. Def ined f rom VIL to VIH f or rise time, and f rom VIH to VIL f or f all time.
9.6.10.2
JTAG Interface Test Circuit
Figure 35: JTAG Interface Test Circuit
Test Point
CL
MV-S104552-U0 Rev. D
Page 100
Document Classification: Proprietary Information
Copyright © 2008 Marvell
December 6, 2008, Preliminary