MV78100 Datasheet, PDF (37/124 Pages) –

Pin Information
Pin Descriptions
Table 15: TDM Interface Pin Assignments (Continued)
Pin Name
I/O Pin
Ty p e
Power Description
Rails
TDM0_SCSn
TDM1_SCSn
O
CMOS
VDDO_B
or
VDDO_C
SPI chip select0/1
Driven by MV78100 to the SLIC device. Useful when the MV78100
interfaces two SLIC devices and uses two SPI chip select signals
(one to each SLIC device) rather than chaining of the devices.
NOTE: Multiplexed on MPP.
TDM_SCLK
O
CMOS
VDDO_B
or
VDDO_C
SPI clock
Driven by the MV78100 to the SLIC device.
NOTE: Multiplexed on MPP.
TDM_SMOSI
O
CMOS
VDDO_B
or
VDDO_C
SPI write data
Driven by the MV78100 to the SLIC device.
NOTE: Multiplexed on MPP.
TDM_SMISO
I
CMOS
VDDO_B SPI read data
or
Driven by the SLIC device to the MV78100
VDDO_C NOTE: Multiplexed on MPP.
Note
The SLIC device has a dedicated SPI interface for SLIC registers access. This is not the MV78100 SPI
interface listed in Section 2.2.10, SPI Interface Pin Assignment, on page 34.
Copyright © 2008 Marvell
December 6, 2008, Preliminary
Document Classification: Proprietary Information
MV-S104552-U0 Rev. D
Page 37