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MV78100 Datasheet, PDF (71/124 Pages) –
Electrical Specifications
AC Electrical Specifications
Table 31: Reference Clock and Reset AC Timing Specifications
Description
TCLK_OUT Reference Clock
Symbol
Min
Frequency
Clock duty cycle
TCLK_IN Reference Clock
FTCLK_OUT
DCTCLK_OUT
40
Frequency
Clock duty cycle
Slew rate
Pk-Pk jitter
Reset Specifications
FTCLK_IN
150
DCTCLK_IN
40
SRTCLK_IN
0.7
JRTCLK_IN
Refer to Section 7, System Power Up and Reset
Settings.
Max
166
60
Units Notes
5
MHz
%
3
200
MHz 4
60
%
V/ns 1
200
ps
Notes:
1. Slew rate is defined from 20% to 80% of the reference clock signal.
2. Defined on linear sweep or “Hershey’s Kiss” (US Patent 5,631,920) modulations.
3. The load is CL = 15 pF.
4. See Table 22, Reset Configuration, on page 52 for more details.
5. Relevant only when working in source synchronous device bus mode.
6. For additional information regarding configuring this clock, see the Serial Memory Interface
Control Register in the MV76100, MV78100, and MV78200 Functional Specification.
7. For additional information regarding configuring this clock, see the TDM Interface section in the
MV76100, MV78100, and MV78200 Functional Specifications.
Figure 6: TCLK_Out Reference Clock Test Circuit
Test Point
CL
Copyright © 2008 Marvell
December 6, 2008, Preliminary
Document Classification: Proprietary Information
MV-S104552-U0 Rev. D
Page 71