LTC3883 Datasheet, PDF (89/112 Pages) Linear Technology – Single Phase Step-Down DC/DC Controller with Digital Power System Management

LTC3883/LTC3883-1
PMBus Command Details
MFR_GPIO_PROPAGATE_LTC3883
The MFR_GPIO_PROPAGATE_LTC3883 command enables the events that can cause the GPIO pin to assert low. The
command is formatted as shown in Table 10. Faults can only be propagated to the GPIO pin if they are programmed
to respond to faults.
This command has two data bytes.
Table 10: GPIO Propagate Configuration
The GPIO pin is designed to provide electrical notification of selected events to the user.
BIT(S) SYMBOL
OPERATION
B[15] VOUT disabled while not decayed.
This status bit is used in a PolyPhase configuration when bit 0 of the MFR_CHAN_CONFIG_
LTC3883 is a zero. If the PWM is turned off, by toggling the RUN pin or commanding the part OFF,
and then the RUN is reasserted or the part is commanded back on before the output has decayed,
VOUT will not restart until the 12.5% decay is honored. The GPIO pin is asserted during this
condition if bit 15 is asserted.
B[14] Mfr_gpio_propagate_short_CMD_cycle 0: No action
1: This status bit asserts low if commanded off then on before the output has sequenced off.
Re-asserts high after sequence off.
b[13] Mfr_gpio_propagate_ton_max_fault 0: No action if a TON_MAX_FAULT fault is asserted
1: GPIO will be asserted low if a TON_MAX_FAULT fault is asserted
b[12] Mfr_gpio_propagate_vout_uvuf
Deglitched VOUT_UV_FAULT_LIMIT comparator output with a 250µs minimum pulse width filter.
If this status bit is asserted, GPIO is low anytime VOUT is below the UV threshold. If the GPIO_
FAULT_RESPONSE is not set to ignore, the part will latch off and never be able to start.
b[11] Mfr_gpio_propagate_int_ot
0: No action if the MFR_OT_FAULT_LIMIT fault is asserted
1: Output will be asserted low if the MFR_OT_FAULT_LIMIT fault is asserted
b[10] Reserved
Must be set to 0
b[9] Mfr_pwrgd_en (Note 1)
0: No action if POWER_GOOD is not true
1: GPIO will be asserted low if POWER_GOOD is not true
If this status bit is asserted, the GPIO_FAULT_RESPONSE must be ignore. If the GPIO_FAULT_
RESPONSE is not set to ignore, the part will latch off and never be able to start.
b[8] Mfr_gpio_propagate_ut
0: No action if the UT_FAULT_LIMIT fault is asserted
1: GPIO will be asserted low if the UT_FAULT_LIMIT fault is asserted
b[7] Mfr_gpio_propagate_ot
0: No action if the OT_FAULT_LIMIT fault is asserted
1: GPIO will be asserted low if the OT_FAULT_LIMIT fault is asserted
b[6] Reserved
b[5] Reserved
b[4] Mfr_gpio_propagate_input_ov
0: No action if the VIN_OV_FAULT_LIMIT fault is asserted
1: GPIO will be asserted low if the VIN_OV_FAULT_LIMIT fault is asserted
b[3] Reserved
b[2] Mfr_gpio_propagate_iout_oc
0: No action if the IOUT_OC_FAULT_LIMIT fault is asserted
1: GPIO will be asserted low if the IOUT_OC_FAULT_LIMIT fault is asserted
b[1] Mfr_gpio_propagate_vout_uv
0: No action if the VOUT_UV_FAULT_LIMIT fault is asserted
1: GPIO will be asserted low if the VOUT_UV_FAULT_LIMIT fault is asserted
If this fault bit is asserted, GPIO is low anytime VOUT is below the UV threshold due to a fault. A
UV fault can only occur when the part is in a steady-state ON condition.
b[0] Mfr_gpio_propagate_vout_ov
0: No action if the VOUT_OV_FAULT_LIMIT fault is asserted
1: GPIO will be asserted low if the VOUT_OV_FAULT_LIMIT fault is asserted
Note 1: The PWRGD status is designed as an indicator and not to be used for power supply sequencing.
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