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LTC3883 Datasheet, PDF (45/112 Pages) Linear Technology – Single Phase Step-Down DC/DC Controller with Digital Power System Management
LTC3883/LTC3883-1
Applications Information
voltage exceeds the RDS(ON) test voltage for the MOSFETs
which is typically 4.5V for logic level devices. The UVLO
on INTVCC (EXTVCC) is set to approximately 4V. Both the
LTC3883 and LTC3883-1 are valid for this configuration.
Topside MOSFET Driver Supply (CB, DB)
External bootstrap capacitors CB connected to the BOOST
pin supplies the gate drive voltages for the topside MOS-
FETs. Capacitor CB in the Block Diagram is charged though
external diode DB from INTVCC when the SW pin is low.
When one of the topside MOSFETs is to be turned on,
the driver places the CB voltage across the gate source
of the desired MOSFET. This enhances the MOSFET and
turns on the topside switch. The switch node voltage, SW,
rises to VIN and the BOOST pin follows. With the topside
MOSFET on, the boost voltage is above the input supply:
VBOOST = VIN + VINTVCC. The value of the boost capacitor
CB needs to be 100 times that of the total input capacitance
of the topside MOSFET(s). The reverse breakdown of the
external Schottky diode must be greater than VIN(MAX).
When adjusting the gate drive level, the final arbiter is the
total input current for the regulator. If a change is made
and the input current decreases, then the efficiency has
improved. If there is no change in input current, then there
is no change in efficiency.
PWM jitter has been observed in some designs operating
at higher VIN/VOUT ratios. This jitter does not substantially
affect the circuit accuracy. Referring to Figure 24, PWM
jitter can be removed by inserting a series resistor with a
value of 1Ω to 5Ω between the cathode of the diode and
the BOOST pin. A resistor case size of 0603 or larger is
recommended to reduce ESL and achieve the best results.
VIN
BOOST
TGATE
LTC3883/
LTC3883-1
SW
INTVCC/EXTVCC
BGATE
1Ω TO 5Ω
DB
CB
0.2µF
CINTVCC
10µF
PGND
VIN
3883 F24
Figure 24. Boost Circuit to Minimize PWM Jitter
Undervoltage Lockout
The LTC3883 is initialized by an internal threshold-based
UVLO where VIN must be approximately 4V and INTVCC/
EXTVCC, VDD33, VDD25 must be within approximately 20%
of the regulated values. In addition, VDD33 must be within
approximately 7% of the targeted value before the RUN
pin is released. After the part has initialized, an additional
comparator monitors VIN. The VIN_ON threshold must
be exceeded before the power sequencing can begin.
When VIN drops below the VIN_OFF threshold, the RUN
pin will be pulled low and VIN must increase above the
VIN_ON threshold before the controller will restart. The
normal start-up sequence will be allowed after the VIN_ON
threshold is crossed.
It is possible to program the contents of the NVM in the
application if the VDD33 supply is externally driven. This will
activate the digital portion of the LTC3883 without engaging
the high voltage sections. PMBus communications are valid
in this supply configuration. If VIN has not been applied to
the LTC3883, bit 3 (NVM Not Initialized)in MFR_COMMON
will be asserted low. If this condition is detected, the part
will only respond to addresses 5A and 5B. To initialize
the part issue the following set of commands: global
address 0x5B command 0xBD data 0x2B followed by
global address 5B command 0xBD and data 0xC4. The
part will now respond to the correct address. Configure
the part as desired then issue a STORE_USER_ALL. When
VIN is applied a MFR_RESET command must be issued to
allow the PWM to be enabled and valid ADC conversions
to be read.
CIN and COUT Selection
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle (VOUT)/(VIN). To prevent
large voltage transients, a low ESR capacitor sized for the
maximum RMS current of one channel must be used. The
maximum RMS capacitor current is given by:
( )( ) CIN
Required
IRMS
≈
IMAX
VIN

VOUT
VIN – VOUT 1/2
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2. This simple worst-case condition is com-
monly used for design because even significant deviations
3883f
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