LTC3883 Datasheet, PDF (54/112 Pages) Linear Technology – Single Phase Step-Down DC/DC Controller with Digital Power System Management

LTC3883/LTC3883-1
Applications Information
When connecting a 3-phase LTC3883/LTC3880, the V_IN
pin and power stage of the LTC3880 should be connected
to the downstream side of the LTC3883 input current
sense resistor. This allows the user to measure the total
input current of the rail. Refer to the Typical Application
circuit: High Efficiency 3-Phase 350kHz 1.8V Step-Down
Converter with Input Current Sense. The inductor DCR for
all three inductors of LTC3883/LTC3880 application can
be calculated. The DCR auto calibration routine can be
performed on the LTC3883 phase by shutting down the
other two phases. The DCR of the inductors of the LTC3880
phases can be calculated using the READ_IIN value of
the LTC3883, and the MFR_READ_IIN of the LTC3880
phases. The user can shut down the other two phases
and adjust the IOUT_CAL_GAIN value of the respective
LTC3880 phase so that the active phase’s MFR_READ_IIN
= READ_IIN of the LTC3883.
The user may also calibrate the DCR of all three inductors
by only shutting down one phase at a time and leaving the
other two phases active, however the DCR auto calibration
routine cannot be used for the LTC3883 phase. The
IOUT_CAL_GAIN value of all the inductors should be set
to the nominal DRC value, DCR_NOM prior to beginning
the procedure.
During the procedure, the circuit must be in a steady-state
load condition, with the converter in CCM and sufficient
load current to create a 6mV average signal across the
R_IINSNS sense resistor, as well as 6mV across the output
current sense network. First, the user needs to record
the values of READ_IIN of the LTC3883 as well as the
READ_IOUT for all three phases. These values are referred
to as READ_IIN_A, READ_IOUT_1A, READ_IOUT_2A, and
READ_IOUT_3A.
Next, phase 1 should be shut off and the values for READ_
IIN of the LTC3883 and the READ_IOUT for the two active
phases need to be recorded. These values are referred to
as READ_IIN_B, READ_IOUT_2B, and READ_IOUT_3B.
To calculate the DCR of phase 1:
Verify that READ_IIN_A = READ_IIN_B
54
The actual current of phase 1, IOUT_1A is calculated by:
IOUT_1A = READ_IIN_A – READ_IIN_A •
{(READ_IOUT_2A + READ_IOUT_3A)/(READ_
IOUT_2B + READ_IOUT_3B)
The actual DCR of the phase 1 inductor is calibrated to
the correct value by:
DCR_CAL = DCR_NOM • (IOUT_1A/READ_IOUT_A)
The user then needs to update the IOUT_CAL_GAIN
command value with the calibrated value of inductor
DCR, DCR_CAL.
The above procedure can then be repeated to determine
the inductor DCR for phases 2 and 3.
Reference the subsection titled Inductor DCR Auto Cali-
bration in the Applications Information section for further
detail regarding the operating conditions that must be met
to accurately calculate the inductor DCR.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the IC. These items are also illustrated graphically in the
layout diagram of Figure 26. Figure 27 illustrates the cur-
rent waveforms present in the various branches of the
synchronous regulator operating in the continuous mode.
Check the following in your layout:
1. Is the top N-channel MOSFET, M1, located within 1cm
of C_IN?
2. Are ground and power ground kept separate? The com-
bined IC ground pin and the ground return of C_INTVCC
must return to the combined C_OUT (–) terminals. The I_TH
trace should be as short as possible. The path formed by
the top N-channel MOSFET, Schottky diode and the C_IN
capacitor should have short leads and PC trace lengths.
The output capacitor (–) terminals should be connected
as close as possible to the (–) terminals of the input ca-
pacitor by placing the capacitors next to each other and
away from the Schottky loop described above.
3. Are the I_SENSE+ and I_SENSE– leads routed together with
minimum PC trace spacing? The filter capacitor between
I_SENSE+ and I_SENSE– should be as close as possible to
3883f