LTC3883 Datasheet, PDF (21/112 Pages) Linear Technology – Single Phase Step-Down DC/DC Controller with Digital Power System Management

LTC3883/LTC3883-1
Operation
command. The resulting measured powerstage current
is returned by the READ_IIN command.
The MFR_READ_IIN_CHAN command returns the
calculated powerstage current based on the READ_IOUT
value multiplied by the READ_DUTY_CYCLE value.
The LTC3883 uses an internal 1Ω sense resistor to
measure the V_IN pin supply current being consumed by the
LTC3883. This value is returned by the MFR_READ_ICHIP
command. Refer to the subsection titled Input Current
Sense Amplifier in the Applications Information section
for further detail.
Load Sharing
Multiple LTC3883’s can be arrayed in order to provide a
balanced load-share solution by bussing the necessary
pins. Figure 3 illustrates the shared connections required
for load sharing.
The frequency must only be programmed on one of the
LTC3883s. The other(s) must be programmed to External
Clock.
External/Internal Temperature Sense
External temperature can be best measured using a remote
diode-connected PNP transistor such as the MMBT3906.
The emitter should be connected to the TSNS pin while the
base and collector terminals of the PNP transistor should
be returned to the LTC3883’s GND pin, preferably using a
star connection. It is possible to connect the collector of the
PNP to the source of the bottom MOSFET. This may optimize
board layout allowing the PNP closer proximity to the power
FETs. The base of the PNP must still be tied to ground. For
best noise immunity, the connections should be routed
differentially and a 10nF capacitor should be placed in parallel
with the diode connected PNP. Two different currents are
applied to the diode (nominally 2µA and 32µA) and the
V_SUPPLY
100Ω
100Ω
100Ω
CONTROL
SMBALERT
FAULT
PWM CLOCK
SHARE CLOCK
LTC3883 + POWER STAGE
V_IN
POWER STAGE
I_TH
I_{IN_SNS}
V_{IN_SNS}
II^{SSEENNSSEE+–}
VV_{SSEENNSSEE+–}
RUN
ALERT
GPIO
SYNC
SHARE_CLK
GND
PGND
100Ω
NOTE: SOME CONNECTORS
AND COMPONENTS OMITTED
FOR CLARITY
LTC3883 + POWER STAGE
I_TH
V_IN
POWER STAGE
I_{IN_SNS}
V_{IN_SNS}
RUN
ALERT
GPIO
SYNC
SHARE_CLK
II_{SSEENNSSEE+–}
VV_{SSEENNSSEE+–}
GND
PGND
Figure 3. Load Sharing Connections for 2-Phase Operation
LOAD
3883 F03
3883f
21