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LTC3883 Datasheet, PDF (25/112 Pages) Linear Technology – Single Phase Step-Down DC/DC Controller with Digital Power System Management
LTC3883/LTC3883-1
OPERATION
by a combination of the ASEL configuration pin and the
MFR_ADDRESS command. Device addressing can be
disabled by writing a value of 0x80 to the MFR_ADDRESS.
Rail addressing provides a means of the PMBus master
addressing a set of LTC3883s connected to the same output
rail, simultaneously. This is similar to global addressing,
however, the PMBus address can be dynamically assigned
by using the MFR_RAIL_ADDRESS command. It is recom-
mended that rail addressing should be limited to command
write operations.
All four means of PMBus addressing require the user to
employ disciplined planning to avoid addressing conflicts.
Responses to VOUT and IOUT Faults
VOUT OV and UV conditions are monitored by comparators.
The OV and UV limits are set in three ways.
n As a Percentage of the VOUT if Using the Resistor Con-
figuration Pins
n In NVM if Either Programmed at the Factory or Through
the GUI
n By PMBus Command
The IIN and IOUT overcurrent monitors are performed by
ADC readings and calculations. Thus these values are
based on average currents and can have a time latency of
up to 120ms. The IOUT calculation accounts for the sense
resistor and the temperature coefficient of the resistor. The
input channel current is equal to the sum of output current
times the PWM duty cycle plus the input offset current
for each channel. If this calculated input current exceed
the IN_OC_WARN_LIMIT the ALERT pin is pulled low and
the IIN_OC_WARN bit is asserted in the STATUS_INPUT
command.
The digital processor within the LTC3883 provides the
ability to ignore the fault, shut down and latch off or shut
down and retry indefinitely (hiccup). The retry interval
is set in MFR_RETRY_DELAY and can be from 120ms
to 83.88 seconds in 1ms increments. The shutdown for
OV/UV and OC can be done immediately or after a user
selectable deglitch time.
Output Overvoltage Fault Response
A programmable overvoltage comparator (OV) guards
against transient overshoots as well as long-term over-
voltages at the output. In such cases, the top MOSFET is
turned off and the bottom MOSFET is turned on until the
overvoltage condition is cleared regardless of the PMBus
VOUT_OV_FAULT_RESPONSE command byte value. This
hardware level fault response delay is typically 2µs from
the overvoltage condition to BG asserted high. Using the
VOUT_OV_FAULT_RESPONSE command, the user can
select any of the following behaviors:
n OV Pull-Down Only (OV cannot be ignored)
n Shut Down (Stop Switching) Immediately—Latch Off
n Shut Down Immediately—Retry Indefinitely at the Time
Interval Specified in MFR_RETRY_DELAY
Either the Latch Off or Retry fault responses can be de-
glitched in increments of (0-7) • 10µs. See Table 5.
Output Undervoltage Response
The response to an undervoltage comparator output can
be either:
n Ignore
n Shut Down Immediately—Latch Off
n Shut Down Immediately—Retry Indefinitely at the Time
Interval Specified in MFR_RETRY_DELAY
The UV responses can be deglitched. See Table 6.
Peak Output Overcurrent Fault Response
Due to the current mode control algorithm, peak output
current across the inductor is always limited on a cycle by
cycle basis. The value of the peak current limit is specified
in sense voltage in the EC table. The current limit circuit
operates by limiting the ITH maximum voltage. If DCR sens-
ing is used, the ITH maximum voltage has a temperature
dependency directly proportional to the TC of the DCR of
the inductor. The LTC3883 automatically monitors the
external temperature sensors and modifies the maximum
allowed ITH to compensate for this term.
3883f
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