LTC3883 Datasheet, PDF (51/112 Pages) Linear Technology – Single Phase Step-Down DC/DC Controller with Digital Power System Management

LTC3883/LTC3883-1
Applications Information
Frequency and Phase Selection Using RCONFIG
The frequency and phase commands are linked if they
are set using the RCONFIG pins. If PMBus commands
are used the two parameters are independent. The SYNC
pins must be shared in poly-phase configurations where
multiple LTC3883s are used to produce the output. If
the configuration is not PolyPhase the SYNC pins do not
have to be shared. If the SYNC pins are shared between
LTC3883s only one SYNC pin can be set as a frequency
output, all other SYNC pins must be set to External Clock.
For example in a 2-phase configuration clocked at 425kHz,
one of the LTC3883s must be set to the desired frequency
and phase and the other LTC3883 must be set to External
Clock. All phasing is with respect to the falling edge of SYNC.
LTC3883 Chip 1 set the frequency to 425kHz with 180°
phase shift:
R_TOP = 20kΩ and R_BOTTOM = 15kΩ
LTC3883 Chip 2 set the frequency to External Clock with
0° phase shift:
R_TOP = open and R_BOTTOM = 0Ω
Frequencies of 350kHz, 750kHz and 1000kHz can only be
set using NVM programming. If a 6-phase configuration
is desired, NVM programming will give optimal phasing.
All other configurations in frequency and phasing can be
achieved using the FREQ_CFG pin.
Address Selection Using RCONFIG
The LTC3883 address may be selected using a combination
of the address stored in NVM and the ASEL pin. The three
MSBs of the device address are set by the three MSBs
stored in NVM, and four LSBs of the device address are
set by the ASEL pin. This allows 16 different LTC3883s
on a single board with one programmed address in NVM.
If the address stored in NVM is 0x4F, then the part address
can be set from 0x40 to 0x4F using ASEL. (The standard
default address is 0x4F). Do not set any part address to
0x5A or 0x5B because these are global addresses and all
parts will respond to them.
To choose address 0x40 R_TOP is open and
R_BOTTOM = 0Ω
To choose address 0x45 R_TOP = 24.9k and
R_BOTTOM = 7.32k
To choose address 0x4E R_TOP = 10.0k and
R_BOTTOM = 15.8k
Table 15A¹. LTC3883 MFR_ADDRESS Command Examples
Expressing Both 7- or 8-Bit Addressing
HEX DEVICE
ADDRESS BIT BIT BIT BIT BIT BIT BIT BIT
DESCRIPTION 7 BIT 8 BIT 7 6 5 4 3 2 1 0 R/W
Rail⁴
0x5A 0xB4 0 1 0 1 1 0 1 0 0
Global⁴
0x5B 0xB6 0 1 0 1 1 0 1 1 0
Default
Example 1
0x4F 0x9E 0 1 0 0 1 1 1 1 0
0x60 0xC0 0 1 1 0 0 0 0 0 0
Example 2 0x61 0xC2 0 1 1 0 0 0 0 1 0
Disabled^2,3,5
10000000 0
Note 1: This table can be applied to the MFR_RAIL_ADDRESS command
as well as the MFR_ADDRESS command.
Note 2: A disabled value in one command does not disable the device, nor
does it disable the Global address.
Note 3: A disabled value in one command does not inhibit the device from
responding to device addresses specified in other commands.
Note 4: It is not recommended to write the value 0x00, 0x0C (7 bit), or
0x5A or 0x5B (7 bit) to the MFR_ADDRESS or the MFR_RAIL_ADDRESS
commands.
Note 5: To disable the address enter 0x80 in the MFR_ADDRESS
command. The 0x80 is greater than the 7-bit address field, disabling the
address.
Table 15. ASEL
R_TOP (kΩ)
0 or Open
R_BOTTOM (kΩ)
Open
10
23.2
10
15.8
16.2
20.5
16.2
17.4
20
17.8
20
15
20
12.7
20
11
24.9
11.3
24.9
9.09
24.9
7.32
24.9
5.76
24.9
4.32
30.1
3.57
30.1
1.96
Open
0
SLAVE ADDRESS
NVM
NVM (3MSBs)_1111
NVM (3MSBs)_1110
NVM (3MSBs)_1101
NVM (3MSBs)_1100
NVM (3MSBs)_1011
NVM (3MSBs)_1010
NVM (3MSBs)_1001
NVM (3MSBs)_1000
NVM (3MSBs)_0111
NVM (3MSBs)_0110
NVM (3MSBs)_0101
NVM (3MSBs)_0100
NVM (3MSBs)_0011
NVM (3MSBs)_0010
NVM (3MSBs)_0001
NVM (3MSBs)_0000
LSB HEX
F
E
D
C
B
A
9
8
7
6
5
4
3
2
1
0
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