LTC3883 Datasheet, PDF (23/112 Pages) Linear Technology – Single Phase Step-Down DC/DC Controller with Digital Power System Management

LTC3883/LTC3883-1
Operation
mode (FREQ_CFG pin shorted to ground). If no external
clock is supplied, the part will clock at the lowest free-
running frequency of the internal PWM oscillator. This low
clock rate will increase the ripple current of the inductor
possibly producing undesirable operation. If the external
SYNC signal is missing or misbehaving, a “PLL Lock Status”
fault will be indicated in the STATUS_MFR_SPECIFIC
command. If the user does not wish to see the PLL_FAULT
even if there is not a valid synchronization signal at power
up, bit 3 of the MFR_CONFIG_ALL_LTC3883 command
must be asserted. If the SYNC pin is connected between
multiple ICs only one of the ICs can be the oscillator, all
other ICs must be configured to external clock.
The ASEL pin settings are described in Table 15. This
pin selects the bottom 4 bits of the slave address for the
LTC3883. The three most significant bits are retrieved from
the NVM MFR_ADDRESS command. If the pin is floating,
the 7-bit value stored in NVM MFR_ADDRESS command
is used to determine the slave address. For more detail,
refer to Table 15a.
Note: Per the PMBus specification, pin programmed
parameters can be overridden by commands from the
digital interface with the exception of ASEL which is
always honored. Do not set any part address to 0x5A or
0x5B because these are global addresses and all parts
will respond to them.
Fault Detection and Handling
A variety of fault and warning reporting and handling
mechanisms are available. Fault and warning detection
capabilities include:
n _{Input OV/FAULT Protection and UV Warning}
n _{Average Input OC Warn}
n _{Output OV/UV Fault and Warn Protection}
n _{Output OC Fault and Warn Protection}
n _{Internal and External Overtemperature Fault and Warn}
Protection
n _{External Undertemperature Fault and Warn Protection}
n _{CML Fault (Communication, Memory or Logic)}
n _{External Fault Detection via the Bidirectional GPIO Pins.}
In addition, the LTC3883 can map any combination of
fault indicators to the GPIO pin using the propagate GPIO
response commands, MFR_GPIO_PROPAGATE_LTC3883.
Typical usage of the GPIO pin is as a driver for an external
crowbar device, overtemperature alert, overvoltage alert
or as an interrupt to cause a microcontroller to poll the
fault commands. Alternatively, the GPIO pin can be used
as an input to detect external faults downstream of the
controller that require an immediate response. The GPIO
pin can also be configured as a power good output. Power
good indicates the controller output is above the power
good threshold. At power-up the pin will initially be three-
state. If it is necessary to have the desired polarity on the
pin at power-up in this configuration, attach a Schottky
diode between the RUN pin of the propagated power good
signal and the GPIO pin. The Cathode must be attached
to RUN and the Anode to the GPIO pin. If the GPIO pin is
set to a power good status, the MFR_GPIO_RESPONSE
must be ignore otherwise there is a latched off condition
with the controller.
As described in the Soft-Start section, it is possible to
control start-up through concatenated events. If GPIO is
used to drive the RUN pin of another controller, the unfiltered
VOUT_UV fault limit should be mapped to the GPIO pin.
Any fault or warning event will cause the ALERT pin to
assert low. The pin will remain asserted low until the
CLEAR_FAULTS command is issued, the fault bit is written
to a 1 or bias power is cycled or a MFR_RESET command
is issued, or the RUN pin is toggled OFF/ON or the part
is commanded OFF/ON via PMBus or an ARA command
operation is performed. The MFR_GPIO_PROPAGATE_
LTC3883 command determines if the GPIO pin is pulled
low when a fault is detected; however, the ALERT pin is
always pulled low if a fault or warning is detected and the
status bits are updated.
Output and input fault event handling is controlled by the
corresponding fault response byte as specified in Tables 5
to 9. Shutdown recovery from these types of faults can
either be autonomous or latched. For autonomous recovery,
the faults are not latched, so if the fault condition is not
present after the retry interval has elapsed, a new soft-
start is attempted. If the fault persists, the controller will
continue to retry. The retry interval is specified by the
3883f
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