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ISL6324A Datasheet, PDF (38/39 Pages) Intersil Corporation – Monolithic Dual PWM Hybrid Controller Powering AMD SVI Split-Plane and PVI Uniplane Processors
ISL6324A
RAPA
CAPA
C2
CC
RC
FB
COMP
ISEN3+
ISEN3-
PWM3
RFB
VSEN
BOOT1
UGATE1
PHASE1
APA
DVC
LGATE1
ISEN1-
ISEN1+
+5V
CFILTER
VCC
PVCC1_2
FS
RFS
BOOT2
UGATE2
RSET
NC
NC
PHASE2
RSET
VFIXEN
SEL
SVD
SVC
VID4
VID5
PWROK
VDDPWRGD
GND
LGATE2
ISEN2-
ISEN2+
RGND
ISEN4+
ISEN4-
+12V
SCL
SDA
PWM4
ISL6324A
OFF
ON
REN1
EN
REN2
PVCC_NB
BOOT_NB
UGATE_NB
PHASE_NB
LGATE_NB
ISEN_NB-
COMP_NB
FB_NB
RC_NB
CC_NB
ISEN_NB+
RFB_NB
+12V
CBOOT
CIN
R1_1
C1
R1_2
+12V
R3_2
C3
R3_1CIN
CBOOT
BOOT1
UGATE1
PHASE1
LGATE1
PGND
PWM1
CFILTER
CBOOT
+12V
V_CORE
CIN
CBULK
CHF
R2_1
C2
R2_2
CPU
LOAD
+12V
CIN
C4
R4_1
R4_2
ISL6614 +12V
BOOT2
CBOOT
VCC
PVCC
UGATE2
PHASE2
GND
PWM2
LGATE2
CFILTER
+12V
CFILTER
CBOOT_NB
CIN
R1_NB C1_NB CBULK
R2_NB
V_NB
CHF
NB
LOAD
KEY
HEAVY TRACE ON CIRCUIT PLANE LAYER
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT PLANE LAYER
VIA CONNECTION TO GROUND PLANE
RED COMPONENTS:
LOCATE CLOSE TO IC TO
MINIMIZE CONNECTION PATH
BLUE COMPONENTS:
LOCATE NEAR LOAD
(MINIMIZE CONNECTION PATH)
MAGENTA COMPONENTS:
LOCATE CLOSE TO SWITCHING TRANSISTORS
(MINIMIZE CONNECTION PATH)
FIGURE 29. PRINTED CIRCUIT BOARD POWER PLANES AND ISLANDS
38
FN6880.1
April 29, 2010