ISL6324A Datasheet, PDF (27/39 Pages) Intersil Corporation – Monolithic Dual PWM Hybrid Controller Powering AMD SVI Split-Plane and PVI Uniplane Processors

ISL6324A
Register Bit Definitions
The bits for RGS1 and RGS2 are utilized in the same
manner by the ISL6324A (see Table 5). Bit-7 enables the
overvoltage protection trip point to be increased. Bit-6
enables the Power-good trip point to be increased. These
bits will be interpreted by the ISL6324A according to Table 7.
Bits 5 through 0 determine the amount of offset for the
particular regulator. See Table 8 for the bit codes and the
corresponding offset voltages from the nominal DAC.
TABLE 7. BIT [7] AND [6] of REGISTER RGS1 AND RGS2
BIT 7
OVP TRIP LEVEL
0
1
BIT 6
1.8V or V_DAC + 250mV, whichever is greater
1.8V or V_DAC + 500mV, whichever is greater
PGOOD TRIP LEVEL
0
VDAC_CORE +250mV/-300mV
VDAC_NB - 300mV
1
VDAC_CORE +300mV/-350mV
VDAC_NB - 350mV
NOTE: All Pgood trip points have 50mV hysteresis
TABLE 8. BITS [5:0] REGISTER RGS1 and RGS2
(VOLTAGE MARGINING OFFSET)
BIT5
VO5
BIT4
VO4
BIT3
VO3
BIT2
VO2
BIT1
VO1
BIT0
VO0
V_OFFSET
(mV)
1
0
0
0
0
0
-800
1
0
0
0
0
1
-775
1
0
0
0
1
0
-750
1
0
0
0
1
1
-725
1
0
0
1
0
0
-700
1
0
0
1
0
1
-675
1
0
0
1
1
0
-650
1
0
0
1
1
1
-625
1
0
1
0
0
0
-600
1
0
1
0
0
1
-575
1
0
1
0
1
0
-550
1
0
1
0
1
1
-525
1
0
1
1
0
0
-500
1
0
1
1
0
1
-475
1
0
1
1
1
0
-450
1
0
1
1
1
1
-425
1
1
0
0
0
0
-400
1
1
0
0
0
1
-375
1
1
0
0
1
0
-350
1
1
0
0
1
1
-325
1
1
0
1
0
0
-300
1
1
0
1
0
1
-275
TABLE 8. BITS [5:0] REGISTER RGS1 and RGS2
(VOLTAGE MARGINING OFFSET) (Continued)
BIT5
VO5
BIT4
VO4
BIT3
VO3
BIT2
VO2
BIT1
VO1
BIT0
VO0
V_OFFSET
(mV)
1
1
0
1
1
0
-250
1
1
0
1
1
1
-225
1
1
1
0
0
0
-200
1
1
1
0
0
1
-175
1
1
1
0
1
0
-150
1
1
1
0
1
1
-125
1
1
1
1
0
0
-100
1
1
1
1
0
1
-75
1
1
1
1
1
0
-50
1
1
1
1
1
1
-25
0
0
0
0
0
0
0
0
0
0
0
0
1
25
0
0
0
0
1
0
50
0
0
0
0
1
1
75
0
0
0
1
0
0
100
0
0
0
1
0
1
125
0
0
0
1
1
0
150
0
0
0
1
1
1
175
0
0
1
0
0
0
200
0
0
1
0
0
1
225
0
0
1
0
1
0
250
0
0
1
0
1
1
275
0
0
1
1
0
0
300
0
0
1
1
0
1
325
0
0
1
1
1
0
350
0
0
1
1
1
1
375
0
1
0
0
0
0
400
0
1
0
0
0
1
425
0
1
0
0
1
0
450
0
1
0
0
1
1
475
0
1
0
1
0
0
500
0
1
0
1
0
1
525
0
1
0
1
1
0
550
0
1
0
1
1
1
575
0
1
1
0
0
0
600
0
1
1
0
0
1
625
0
1
1
0
1
0
650
0
1
1
0
1
1
675
0
1
1
1
0
0
700
0
1
1
1
0
1
725
27
FN6880.1
April 29, 2010