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ISL6324A Datasheet, PDF (32/39 Pages) Intersil Corporation – Monolithic Dual PWM Hybrid Controller Powering AMD SVI Split-Plane and PVI Uniplane Processors
ISL6324A
5. Calculate the value for the RSET resistor using Equation 44:
RSET
=
4----0---0--
3
⋅
-D----C-----R-----C----O----R-----E-----⋅---K--
100μA ⋅ N
⋅
⎛
⎝⎜ IO C PC O R E
+
-V----I--N------–----V----C-----O----R----E---
2 ⋅ LCORE ⋅ fS
⋅
-V----C-V---O-I--N-R-----E- ⎠⎟⎞
Where: K = 1
(EQ. 44)
6. Calculate the OCP trip point for the North Bridge
regulator using Equation 45. If the OCP trip point is higher
than desired, then the component values must be
recalculated utilizing Case 1. If the OCP trip point is lower
than desired, then the component values must be
recalculated utilizing Case 2.
IOCPNB
=
100 μ A
⋅
----------1-----------
DCRNB
⋅
⎝⎛ 4----03---0--
⋅
RS
⎞
E T⎠
+
-V----I--N-----–-----V----N----B---
2 ⋅ LNB ⋅ fS
⋅
-V----N----B--
VIN
(EQ. 45)
NOTE: The values of RSET must be greater than 20kΩ and
less than 80kΩ. For all of the 3 cases, if the calculated value
of RSET is less than 20kΩ, then either the OCP trip point
needs to be increased or the inductor must be changed to an
inductor with higher DCR. If the RSET resistor is greater than
80kΩ, then a value of RSET that is less than 80kΩ must be
chosen and a resistor divider across both North Bridge and
Core inductors must be set up with proper gain. This gain
will represent the variable “K” in all equations. It is also very
important that the RSET resistor be tied between the RSET
pin and the VCC pin of the ISL6323.
Inductor DCR Current Sensing Component Fine
Tuning
MOSFET
DRIVER
VIN
UGATE(n)
LGATE(n)
ISL6323 INTERNAL CIRCUIT
ILn
L
DCR
INDUCTOR
VL(s)
VC(s)
R1
C
R2
VOUT
COUT
In
SAMPLE
+
-
ISEN
VC(s)
RISEN
ISENn-
ISENn+
VCC
RSET
RSET
CSET
FIGURE 21. DCR SENSING CONFIGURATION
Due to errors in the inductance and/or DCR it may be
necessary to adjust the value of R1 and R2 to match the time
constants correctly. The effects of time constant mismatch
can be seen in the form of droop overshoot or undershoot
during the initial load transient spike, as shown in Figure 22.
Follow the steps below to ensure the RC and inductor
L/DCR time constants are matched accurately.
1. If the regulator is not utilizing droop, modify the circuit by
placing the frequency set resistor between FS and
Ground for the duration of this procedure.
2. Capture a transient event with the oscilloscope set to
about L/DCR/2 (sec/div). For example, with L = 1µH and
DCR = 1mΩ, set the oscilloscope to 500µs/div.
3. Record ΔV1 and ΔV2 as shown in Figure 22. Select new
values, R1(NEW) and R2(NEW) for the time constant
resistors based on the original values, R1(OLD) and
R2(OLD) using Equations 46 and 47.
R1(NEW) = R1(OLD) ⋅ ΔΔ----VV----12-
(EQ. 46)
R2(1)(NEW)
=
R2(OLD)
⋅
Δ----V----1-
ΔV2
(EQ. 47)
4. Replace R1 and R2 with the new values and check to see
that the error is corrected. Repeat the procedure if
necessary.
ΔV2
ΔV1
VOUT
ITRAN
ΔI
FIGURE 22. TIME CONSTANT MISMATCH BEHAVIOR
Loadline Regulation Resistor
The loadline regulation resistor, labeled RFB in Figure 8,
sets the desired loadline required for the application.
Equation 48 can be used to calculate RFB.
RFB
=
-----------------V----D----R----O-----O----P----M-----A----X------------------
4----0---0-- ⋅ I--O-----U----T----M----A----X-- ⋅ -D-----C-----R--- ⋅ K
3
N
RSET
(EQ. 48)
Where K is defined in Equation 7.
If no loadline regulation is required, FS resistor should be
tied between the FS pin and VCC. To choose the value for
32
FN6880.1
April 29, 2010