AC82GL40-SLB95 Datasheet, PDF (89/98 Pages) Intel Corporation – Intel® Celeron® Mobile Processor Dual-Core on 45-nm Process

Thermal Specifications and Design Considerations
5.1.4
Intel Thermal Monitor 1 and 2 can co-exist within the processor. If both Intel Thermal
Monitor 1 and 2 bits are enabled in the auto-throttle MSR, Intel Thermal Monitor 2
takes precedence over Intel Thermal Monitor 1. However, if Force Intel Thermal Monitor
1 over Intel Thermal Monitor 2 is enabled in MSRs via BIOS and Intel Thermal Monitor
2 is not sufficient to cool the processor below the maximum operating temperature,
then Intel Thermal Monitor 1 also activates to help cool down the processor.
The TCC may also be activated via on-demand mode. If Bit 4 of the ACPI Intel Thermal
Monitor control register is written to a 1, the TCC activates immediately independent of
the processor temperature. When using on-demand mode to activate the TCC, the duty
cycle of the clock modulation is programmable via bits 3:1 of the same ACPI Intel
Thermal Monitor control register. In automatic mode, the duty cycle is fixed at 50% on,
50% off, however in on-demand mode, the duty cycle can be programmed from 12.5%
on/ 87.5% off, to 87.5% on/12.5% off in 12.5% increments. On-demand mode may be
used at the same time automatic mode is enabled, however, if the system tries to
enable the TCC via on-demand mode at the same time automatic mode is enabled and
a high temperature condition exists, automatic mode takes precedence.
An external signal, PROCHOT# (processor hot) is asserted when the processor detects
that its temperature is above the thermal trip point. Bus snooping and interrupt
latching are also active while the TCC is active.
Besides the thermal sensor and thermal control circuit, the Intel Thermal Monitor also
includes one ACPI register, one performance counter register, three MSR, and one I/O
pin (PROCHOT#). All are available to monitor and control the state of the Intel Thermal
Monitor feature. The Intel Thermal Monitor can be configured to generate an interrupt
upon the assertion or deassertion of PROCHOT#.
PROCHOT# is not be asserted when the processor is in the Stop Grant, Sleep, Deep
Sleep, and Deeper Sleep low power states, hence the thermal diode reading must be
used as a safeguard to maintain the processor junction temperature within maximum
specification. If the platform thermal solution is not able to maintain the processor
junction temperature within the maximum specification, the system must initiate an
orderly shutdown to prevent damage. If the processor enters one of the above low
power states with PROCHOT# already asserted, PROCHOT# will remain asserted until
the processor exits the low power state and the processor junction temperature drops
below the thermal trip point.
If Intel Thermal Monitor automatic mode is disabled, the processor will be operating out
of specification. Regardless of enabling the automatic or on-demand modes, in the
event of a catastrophic cooling failure, the processor will automatically shut down when
the silicon has reached a temperature of approximately 125°C. At this point the
THERMTRIP# signal will go active. THERMTRIP# activation is independent of processor
activity and does not generate any bus cycles. When THERMTRIP# is asserted, the
processor core voltage must be shut down within the time specified in Chapter 3.
In all cases, the Intel Thermal Monitor feature must be enabled for the processor to
remain within specification.
Digital Thermal Sensor
The processor also contains an on die Digital Thermal Sensor (DTS) that can be read
via an MSR (no I/O interface). Each core of the processor will have a unique digital
thermal sensor whose temperature is accessible via the processor MSRs. The DTS is the
preferred method of reading the processor die temperature since it can be located
much closer to the hottest portions of the die and can thus more accurately track the
die temperature and potential activation of processor core clock modulation via the
Intel Thermal Monitor. The DTS is only valid while the processor is in the normal
operating state (the Normal package level low-power state).
Datasheet
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