AC82GL40-SLB95 Datasheet, PDF (77/98 Pages) Intel Corporation – Intel® Celeron® Mobile Processor Dual-Core on 45-nm Process

Package Mechanical Specifications and Pin Information
Table 22. Signal Description (Sheet 3 of 7)
Name
Type
Description
DINV[3:0]# (Data Bus Inversion) are source synchronous and indicate the polarity
of the D[63:0]# signals. The DINV[3:0]# signals are activated when the data on
the data bus is inverted. The bus agent inverts the data bus signals if more than
half the bits, within the covered group, would change level in the next cycle.
DINV[3:0]# Assignment To Data Bus
DINV[3:0]#
Input/
Output
Bus Signal
DINV[3]#
DINV[2]#
DINV[1]#
DINV[0]#
Data Bus
Signals
D[63:48]#
D[47:32]#
D[31:16]#
D[15:0]#
DPRSTP#
DPSLP#
DPWR#
DRDY#
Input
Input
Input/
Output
Input/
Output
DPRSTP# when asserted on the platform causes the processor to transition from
the Deep Sleep State to the Deeper Sleep state. In order to return to the Deep
Sleep State, DPRSTP# must be deasserted. DPRSTP# is driven by the Intel
82801HBM ICH8M I/O Controller Hub-based chipset.
DPSLP# when asserted on the platform causes the processor to transition from the
Sleep State to the Deep Sleep state. In order to return to the Sleep State, DPSLP#
must be deasserted. DPSLP# is driven by the Intel 82801HBM ICH8M chipset.
DPWR# is a control signal used by the chipset to reduce power on the processor
data bus input buffers. The processor drives this pin during dynamic FSB frequency
switching.
DRDY# (Data Ready) is asserted by the data driver on each data transfer,
indicating valid data on the data bus. In a multi-common clock data transfer,
DRDY# may be deasserted to insert idle clocks. This signal must connect the
appropriate pins of both FSB agents.
Data strobe used to latch in D[63:0]#.
DSTBN[3:0]#
Input/
Output
Signals
Associated
Strobe
D[15:0]#, DINV[0]# DSTBN[0]#
D[31:16]#, DINV[1]# DSTBN[1]#
D[47:32]#, DINV[2]# DSTBN[2]#
D[63:48]#, DINV[3]# DSTBN[3]#
DSTBP[3:0]#
Input/
Output
Data strobe used to latch in D[63:0]#.
Signals
Associated Strobe
D[15:0]#, DINV[0]#
D[31:16]#, DINV[1]#
D[47:32]#, DINV[2]#
D[63:48]#, DINV[3]#
DSTBP[0]#
DSTBP[1]#
DSTBP[2]#
DSTBP[3]#
Datasheet
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