GMS87C4060 Datasheet, PDF (62/102 Pages) Hynix Semiconductor – 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C4040/87C4060
PRELIMINARY
L1VPOS
It shows OSD line 1’s vertical position in 9bit format
(LIV8 + L1VPOS, 000 ~ 1FF_H).
OSD line 2’s
attribute Register
ADDRESS : 0AF3_H
RESET VALUE : Undefined
W
W
W
W
W
W
W
W
L2ATTR ^{OBGH WDSL ENOL ENSH CSZ CSZ} FSC2 L2V8
2
2
2
2
21 20
Character
background
height
0: 16dots
1: 18dots
Shadow / Outline
Vertical position
Character size
L2VPOS’s bit8
00: Normal
01: 2 times
10: 3 times
11: Reserved
Foreground shadow
out line color
0: Edge 1’s color
1: Edge 2’s color
width
Shodow control
0: 1dot
Out line control ^{0: Disable}
1: Propotional 0: Disable
1: Enable
to character 1: Enable
size
OSD line 2’s
vertical position Register
W
W
W
W
ADDRESS : 0AF4_H
RESET VALUE : Undefined
W
W
W
W
L2VPOS ^{L2V7 L2V6 L2V5 L2V4 L2V3 L2V2 L2V1 L2V0}
OSD line 2’s vertical position (include L2V8 : 000 ~ 1FF_H)
Figure 17-8 OSD Registers - 5
OSD line 2’s
attribute Register
ADDRESS : 0AF3_H
RESET VALUE : Undefined
W
W
W
W
W
W
W
W
L2ATTR ^{OBGH WDSL ENOL ENSH CSZ CSZ FSC2 L2V8}
2
2
2
2
21 20
Character
background
height
0: 16dots
1: 18dots
Shadow / Outline
Vertical position
Character size
L2VPOS’s bit8
00: Normal
01: 2 times
10: 3 times
11: Reserved
Foreground shadow
out line color
0: Edge 1’s color
1: Edge 2’s color
width
Shodow control
0: 1dot
Out line control ^{0: Disable}
1: Propotional 0: Disable
1: Enable
to character 1: Enable
size
OSD line 2’s
vertical position Register
W
W
W
W
ADDRESS : 0AF4_H
RESET VALUE : Undefined
W
W
W
W
L2VPOS ^{L2V7 L2V6 L2V5 L2V4 L2V3 L2V2 L2V1 L2V0}
OSD line 2’s vertical position (include L2V8 : 000 ~ 1FF_H)
Figure 17-9 OSD Register - 6
L2ATTR
It controls OSD line 2’s attributes. Its function is the same
as L1ATTR.
L2VPOS
It shows OSD line 2’s vertical position. Its function is the
same as L1VPOS.
COLMOD
It controls OSD output mode-RGB direct half intencity.
Color Output Mode
Register
COLMOD
ADDRESS : 0AEF_H
RESET VALUE : Undifined
(see Note)
W
C16EN
Fill with ‘0’
RGB Half intensity enable
1: Enable
0: Enable
Figure 17-10 OSD Register - 7
bit 0: C16EN
It enables RGB port half intencity output. When this bit is
set, RGB port generates half intencity output. Half intenci-
ty output is 3.5V voltage level output of RGB port. When
you use this bit, you must fill all the other bit with ‘0’.
Note: When you do not use RGB direct half intncsity out-
put , please initialize this register as 00h.
MESHCON
It controls OSD mesh mode color.
Mesh Mode Color
Register
ADDRESS : 0AEB_H
RESET VALUE : See Note
MESHCON
Figure 17-11 OSD Register - 8
Note: Please initialize this register as 00h. Though this
register is for mesh mode color, it is not used currently.
VRAM
VRAM contains 1 OSD line, 24 character’s attributes.
Each character’s attribute is constructed with 3 bytes, it
contains color data for background, shadow, outline, char-
acter and character number ( 000_H ~ 1FF_H, 512 characters
58
PRELIMINARY
Nov. 1999 Ver 1.0