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GMS87C4060 Datasheet, PDF (27/102 Pages) Hynix Semiconductor – 8-BIT SINGLE-CHIP MICROCONTROLLERS
PRELIMINARY
GMS81C4040/87C4060
8.3 Data Memory
Figure 8-8 shows the internal Data Memory space availa-
ble. Data Memory is divided into four groups, a user RAM,
control registers, Stack, and OSD memory.
0000H
RAM (192 bytes)
00C0H Peripheral Reg. (64 bytes)
0100H
RAM (256 bytes)
Stack area
0200H
RAM (256 bytes)
0300H
RAM (256 bytes)
0400H
RAM (256 bytes)
0500H
RAM (256 bytes)
0600H
063FH
RAM (64 bytes)
Empty area
0A00H OSD RAM (192 bytes)
0AE0H Peripheral Reg. (32 bytes)
0C00H
0C5FH
Sprite RAM (96 bytes)
Page0
Page1
Page2
Page3
Page4
Page5
Page6
PageA
PageC
Figure 8-8 Data Memory Map
User Memory
The GMS81C4040/GMS87C4060 has 1,536 × 8 bits for
the user memory (RAM).
Control Registers
The control registers are used by the CPU and Peripheral
function blocks for controlling the desired operation of the
device. Therefore these registers contain control and status
bits for the interrupt system, the timer/ counters, analog to
digital converters and I/O ports. The basic control registers
are in address range of 00C0H to 00FFH. And OSD control
registers are assigned within 0AE0H ~ 0AFFH.
Note that unoccupied addresses may not be implemented
on the chip. Read accesses to these addresses will in gen-
eral return random data, and write accesses will have an in-
determinate effect.
More detailed informations of each register are explained
in each peripheral section.
Note: Write only registers can not be accessed by bit ma-
nipulation instruction. Do not use read-modify-write instruc-
tion. Use byte manipulation instruction.
Example; To write at CKCTLR
LDM CLCTLR,#09H ;Divide ratio ÷8
Stack Area
The stack provides the area where the return address is
saved before a jump is performed during the processing
routine at the execution of a subroutine call instruction or
the acceptance of an interrupt.
When returning from the processing routine, executing the
subroutine return instruction [RET] restores the contents of
the program counter from the stack; executing the interrupt
return instruction [RETI] restores the contents of the pro-
gram counter and flags.
The save/restore locations in the stack are determined by
the stack pointed (SP). The SP is automatically decreased
after the saving, and increased before the restoring. This
means the value of the SP indicates the stack location
number for the next save. Refer to Figure 8-4 on page 19.
Address Symbol
00C0H
00C1H
00C2H
00C3H
00C4H
00C5H
00C8H
00C9H
00CAH
00CBH
00CCH
00CDH
00CEH
00CFH
R0
R0DD
R1
R1DD
R2
R2DD
R4
R4DD
R5
R5DD
R6
R6DD
FUNC1
FUNC2
R/W
R/W
W
R/W
W
R/W
W
R/W
W
R/W
W
R/W
W
W
W
Reset Value
Addressing
mode
????????
00000000
????????
00000000
????????
00000000
????????
0000----
????????
----0000
?-------
0-------
-0000000
---00000
byte, bit1
byte2
byte, bit
byte
byte, bit
byte
byte, bit
byte
byte, bit
byte
byte, bit
byte
byte
byte
Table 8-1Control registers
Nov. 1999 Ver 1.0
PRELIMINARY
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