GMS87C4060 Datasheet, PDF (39/102 Pages) Hynix Semiconductor – 8-BIT SINGLE-CHIP MICROCONTROLLERS

PRELIMINARY
GMS81C4040/87C4060
CKCTLR
W
W
W
W
W
W
WDT
ON
ENPCK BTCL
BTS2
BTS1
BTS0
ADDRESS : 00D6_H
RESET VALUE : --01 0111_b
Watch-dog
timer select
0: Normal 6bit timer
1: Watch-dog timer
Peri. Clock
0: Stop
1: Supply
B.I.T Clock
B.I.T set
0: Free run
1: Clear 8-bit counter (BITR) to "0". This bit becomes 0
automatically after 1 machine cycle
Caution:
Both register are in same address,
when write, to be a CKCTLR,
when read, to be a BITR.
BITR
R
R
R
R
R
R
R
R
8-BIT BINARY COUNTER
ADDRESS: 00D6_H
INITIAL VALUE: Undefined
Figure 11-2 BITR: Basic Interval Timer Mode Register
11.2 Timer 0, 1
Timer 0, 1 consists of prescaler, multiplexer, 8-bit compare
data register, 8-bit count register, Control register, and
Comparator as shown in Figure 11-3 .
These Timers can run separated 8bit timer or combined
16bit timer. These timers are operated by internal clock.
The contents of TDR1 are compared with the contents of
up-counter T1. If a match is found, a timer/counter 1 inter-
rupt (T1IF) is generated, and the counter is cleared. Count-
ing up is resumed after the counter is cleared.
Note: You can read Timer 0, Timer 1 value from TDR0 or
TDR1. But if you write data to TDR0 or TDR1, it changes
Timer 0 or Timer 1 modulo data, not Timer value.
The content of TDR0, TDR1 must be initialized (by soft-
ware) with the value between 01_H and FF_H,not to 00_H.
Or not, Timer 0 or Timer 1 can not count up forever.
The control registers for Timer 0,1 are shown below.
Timer mode register 0
ADDRESS : 00D0_H
RESET VALUE : -000 0000_b
RW RW RW RW RW RW RW
TM0
T1ST T1SL1 T1SL0 T0ST T0CN T0SL1 T0SL0
Timer 1 start
0: Count Hold
1: Count Clear and Start
Timer 1 input clock
Timer 0 input clock
00: PS2 (f_ex / 2²)
01: PS4 (f_ex / 2⁴)
10: PS6 (f_ex / 2⁶)
11: PS8 (f_ex / 2⁸)
00: Timer 0 overflow (16bit mode)
01: PS2 (f_ex / 2²)
10: PS4 (f_ex / 2⁴)
11: PS6 (f_ex / 2⁶)
Timer 0 start
0: Count Hold
Timer 0 control
0: Count Hold
1: Count Continue
1: Count Clear and Start
Timer 0 data register
ADDRESS : 00D2_H
RESET VALUE : Undefined
RW RW RW RW RW RW RW RW
TDR0
Timer 1 data register
ADDRESS : 00D3_H
RESET VALUE : Undefined
RW RW RW RW RW RW RW RW
TDR1
Nov. 1999 Ver 1.0
PRELIMINARY
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