GS4911B_09 Datasheet, PDF (97/119 Pages) Gennum Corporation – HD/SD/Graphics Clock and Timing Generator with GENLOCK

Table 3-13: Configuration and Status Registers (Continued)
Register Name
Output_Select_3
Output_Select_4
Output_Select_5
Address
45h
45h
45h
46h
46h
46h
47h
47h
47h
Bit
15-5
4
3-0
15-5
4
3-0
15-5
4
3-0
Description
Reserved. Set these bits to zero when writing to
45h.
Current_3 - selects the current drive capability of
the TIMING_OUT_3 pin. Set this bit HIGH for high
current drive. Otherwise, the current drive will be
low.
Reference: Section 3.8.4 on page 71
This register is used to select one of the 10
pre-programmed or 4 user programmed timing
signals available for output on the TIMING_OUT_3
pin. See Table 3-11 for more details.
Note: The default setting of this register is 0011b,
which corresponds to V Sync.
Reference: Section 3.8.4 on page 71
Reserved. Set these bits to zero when writing to
46h.
Current_4 - selects the current drive capability of
the TIMING_OUT_4 pin. Set this bit HIGH for high
current drive. Otherwise, the current drive will be
low.
Reference: Section 3.8.4 on page 71
This register is used to select one of the 10
pre-programmed or 4 user programmed timing
signals available for output on the TIMING_OUT_4
pin. See Table 3-11 for more details.
Note: The default setting of this register is 0100b,
which corresponds to V Blanking.
Reference: Section 3.8.4 on page 71
Reserved. Set these bits to zero when writing to
47h.
Current_5 - selects the current drive capability of
the TIMING_OUT_5 pin. Set this bit HIGH for high
current drive. Otherwise, the current drive will be
low.
Reference: Section 3.8.4 on page 71
This register is used to select one of the 10
pre-programmed or 4 user programmed timing
signals available for output on the TIMING_OUT_5
pin. See Table 3-11 for more details.
Note: The default setting of this register is 0101b,
which corresponds to F Sync.
Reference: Section 3.8.4 on page 71
R/W
–
R/W
R/W
–
R/W
R/W
–
R/W
R/W
Default
–
0
0011b
–
0
0100b
–
0
0101b
GS4911B/GS4910B HD/SD/Graphics Clock and Timing
Generator with GENLOCK
Data Sheet
36655 - 5
June 2009
97 of 119