GS4911B_09 Datasheet, PDF (43/119 Pages) Gennum Corporation – HD/SD/Graphics Clock and Timing Generator with GENLOCK

frequency determined by the internal default settings of the chip until the user modifies
it via registers 20h to 23h (see Section 3.9.1 on page 72).
If the user sets VID_STD[5:0] = 63 on power-up, the device will wait until a valid
reference has been applied, at which time it will output the same video format as the
input reference and enter Genlock mode if GENLOCK = LOW.
When operating in Free Run or Genlock mode, the GS4911B/GS4910B will continuously
monitor the settings of the VID_STD[5:0] and ASR_SEL[2:0] pins. If the user wishes to
change the format of the output clocks and timing signals, these pins may be
reconfigured at any time, although it is recommended that the device be reset when
changing output video standards.
3.4 Input Reference Signals
The HSYNC, VSYNC, FSYNC, and 10FID reference signals are applied to the
GS4911B/GS4910B via the designated input pins.
To operate in Genlock mode, the input reference signals must be valid and must conform
to a recognized video or graphics standard (see Section 3.5 on page 45). Alternatively, if
VID_STD[5:0] = 62, the signal applied to the HSYNC input must be stable and have a
period of less than 2.4ms.
In Free Run mode, no input reference is required.
Section 3.4.1 on page 43 describes the HSYNC, VSYNC and FSYNC input timing. The
10FID input signal is discussed in Section 3.4.2 on page 44.
3.4.1 HSYNC, VSYNC, and FSYNC
Timing for Video Formats
The HSYNC, VSYNC, and FSYNC input reference signals may have analog timing, such
as from Gennum’s GS4981/82 sync separators (Figure 3-3), or may have digital timing,
such as from Gennum’s GS1559/60A/61 deserializers (Figure 3-4). Section 1.4 on page
20 lists the 36 pre-programmed video timing formats recognized by the
GS4911B/GS4910B.
If the input reference format does not include an F sync signal, the FSYNC pin should be
held LOW.
HSYNC
VSYNC
FSYNC
Figure 3-3: Example HSYNC, VSYNC, and FSYNC Analog Input Timing from a
Sync Separator
GS4911B/GS4910B HD/SD/Graphics Clock and Timing
Generator with GENLOCK
Data Sheet
36655 - 5
June 2009
43 of 119