GS2961 Datasheet, PDF (94/104 Pages) Gennum Corporation – 3Gb/s, HD, SD SDI Receiver, with Integrated Adaptive Cable Equalizer complete with SMPTE Video Processing

Table 4-18: Configuration and Status Registers (Continued)
Address Register Name Bit Name
06Dh
IO_DRIVE
_STRENGTH
RSVD
IO_DS_CTRL_DOUT_MSB
IO_DS_CTRL_STAT
IO_DS_CTRL_DOUT_LSB
06Eh
- 072h
073h
074h
-085h
RSVD
RSVD
EQ_BYPASS
RSVD
EQ_BYPASS
RSVD
RSVD
RSVD
Bit Description
15-6
5-4
3-2
1-0
−
Reserved.
Drive strength adjustment for
DOUT[19:10] outputs and PCLK
output:
00: 4mA;
01: 8mA;
10: 10mA(1.8V), 12mA(3.3V);
11: 12mA(1.8V), 16mA(3.3V)
Drive strength adjustment for
STAT[5:0] outputs:
00: 4mA;
01: 6mA;
10: 8mA(1.8V), 10mA(3.3V);
11: 10mA(1.8V), 12mA(3.3V)
Drive strength adjustment for
DOUT[9:0] outputs:
00: 4mA;
01: 6mA;
10: 8mA(1.8V), 10mA(3.3V);
11: 10mA(1.8V), 12mA(3.3V)
Reserved.
15-10
9
8-0
15-0
Reserved.
0: non-bypass EQ
1: bypass EQ
Reserved.
Reserved.
R/W
R/W
R/W
Default
0
2
R/W
2
R/W
3
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
Table 4-19: ANC Extraction FIFO Access Registers
Address
Register Name
Bit
800h -
BFFh
ANC_PACKET_BANK
15-0
Description
Extracted Ancillary Data 91024 words.
Bit 15-8: Most Significant Word (MSW).
Bit 7-0: Least Significant Word (LSW).
See Section 4.18.8.
Legend:
R = Read only
ROCW = Read Only, Clear on Write
R/W = Read or Write
W = Write only
R/W
R
Default
0
GS2961 3Gb/s, HD, SD SDI Receiver, with Integrated
Adaptive Cable Equalizer
Data Sheet
48004 - 2
November 2009
94 of 104