GS2961 Datasheet, PDF (72/104 Pages) Gennum Corporation – 3Gb/s, HD, SD SDI Receiver, with Integrated Adaptive Cable Equalizer complete with SMPTE Video Processing

4.18.6 Illegal Word Re-mapping
All words within the active picture (outside the horizontal and vertical blanking
periods), between the values of 3FCh and 3FFh are re-mapped to 3FBh. All words within
the active picture area between the values of 000h and 003h are remapped to 004h.
This feature is enabled when the IOPROC_EN/DIS pin is HIGH and the
ILLEGAL_WORD_REMAP_DSX_MASK bit in the IOPROC_X register is set LOW.
4.18.7 TRS and Ancillary Data Preamble Remapping
8-bit TRS and ancillary data preambles are re-mapped to 10-bit values. 8-bit to 10-bit
mapping of TRS headers is only supported if the TRS values are 3FC 000 000. Other
values such as 3FD, 3FE, 3FF, 001, 002 and 003 are not supported. This feature is enabled
by default, and cannot be disabled via the IOPROC_X register.
4.18.8 Ancillary Data Extraction
Ancillary data may be extracted externally from the GS2961 output stream using the
Y/1ANC and C/2ANC signals, and external logic.
As an alternative, the GS2961 includes a FIFO, which extracts ancillary data using read
access via the host interface to ease system implementation. The FIFO stores up to 2048
x 16 bit words of ancillary data in two separate 1024 word memory banks.
The device writes the contents of ANC packets into the FIFO, starting with the first
Ancillary Data Flag (ADF), followed by up to 1024 words.
All Data Identification (DID), Secondary Data Identification (SDID), Data Count (DC),
user data, and checksum words are written into the device memory.
The device detects ancillary data packet DID's placed anywhere in the video data
stream, including the active picture area.
Ancillary data from the Y channel or Data Stream One is placed in the Least Significant
Word (LSW) of the FIFO, allocated to the lower 8 bits of each FIFO address.
Ancillary data from the C channel or Data Stream Two is placed in the Most Significant
Word (MSW) (upper 8 bits) of each FIFO address.
In SD mode, ancillary data is placed in the LSW of the FIFO. The MSW is set to zero.
If the ANC_TYPE registers are all set to zero, the device extracts all types of ancillary
data. If programmable ancillary data extraction is required, then up to five types of
ancillary data to be extracted can be programmed in the ANC_TYPE registers (see
Section 4.17.1).
Additionally, the lines from which the packets are to be extracted can be programmed
into the ANC_LINEA[10:0] and ANC_LINEB[10:0] registers, allowing ancillary data from
a maximum of two lines per frame to be extracted. If only one line number register is
programmed (with the other set to zero), ancillary data packets are extracted from one
line per frame only. When both registers are set to zero, the device extracts packets from
all lines.
GS2961 3Gb/s, HD, SD SDI Receiver, with Integrated
Adaptive Cable Equalizer
Data Sheet
48004 - 2
November 2009
72 of 104