GS4901B Datasheet, PDF(78/95 Page) Gennum Corporation – SD Clock and Timing Generator with GENLOCK

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GS4901B Datasheet, PDF (78/95 Pages) Gennum Corporation – SD Clock and Timing Generator with GENLOCK

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GS4901B/GS4900B Preliminary Data Sheet

Table 3-13: Configuration and Status Registers (Continued)

Address Bit

Description

R/W Default

Output_Select_5

Output_Select_6

Output_Select_7

Output_Select_8

47h

15-5

Reserved. Set these bits to zero when writing to 47h. â

47h

Current_5 - selects the current drive capability of the

R/W

TIMING_OUT_5 pin. Set this bit HIGH for high current

drive. Otherwise, the current drive will be low.

Reference: Section 3.8.4 on page 61

47h

3-0

This register is used to select one of the 10

R/W

0101b

pre-programmed or 4 user programmed timing signals

available for output on the TIMING_OUT_5 pin. See

Table 3-11 for more details.

Note: The default setting of this register is 0101b, which

corresponds to F Sync.

Reference: Section 3.8.4 on page 61

48h

15-5

Reserved. Set these bits to zero when writing to 48h. â

48h

Current_6 - selects the current drive capability of the

R/W

TIMING_OUT_6 pin. Set this bit HIGH for high current

drive. Otherwise, the current drive will be low.

Reference: Section 3.8.4 on page 61

48h

3-0

This register is used to select one of the 10

R/W

0110b

pre-programmed or 4 user programmed timing signals

available for output on the TIMING_OUT_6 pin. See

Table 3-11 for more details.

Note: The default setting of this register is 0110b, which

corresponds to F Digital.

Reference: Section 3.8.4 on page 61

49h

15-5

Reserved. Set these bits to zero when writing to 49h. â

49h

Current_7 - selects the current drive capability of the

R/W

TIMING_OUT_7 pin. Set this bit HIGH for high current

drive. Otherwise, the current drive will be low.

Reference: Section 3.8.4 on page 61

49h

3-0

This register is used to select one of the 10

R/W

0111b

pre-programmed or 4 user programmed timing signals

available for output on the TIMING_OUT_7 pin. See

Table 3-11 for more details.

Note: The default setting of this register is 0111b, which

corresponds to 10FID.

Reference: Section 3.8.4 on page 61

4Ah

15-5

Reserved. Set these bits to zero when writing to 4Ah. â

4Ah

Current_8 - selects the current drive capability of the

R/W

TIMING_OUT_8 pin. Set this bit HIGH for high current

drive. Otherwise, the current drive will be low.

Reference: Section 3.8.4 on page 61

4Ah

3-0

This register is used to select one of the 10

R/W

1000b

pre-programmed or 4 user programmed timing signals

available for output on the TIMING_OUT_8 pin. See

Table 3-11 for more details.

Note: The default setting of this register is 1000b, which

corresponds to Display Enable (DE).

Reference: Section 3.8.4 on page 61

37703 - 0 April 2006

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